hyplnkStatusReg_s Struct Reference
[HYPLNK LLD Register Definitions]

Specification of the HyperLink Status Register. More...

#include <hyplnk.h>

Data Fields

uint32_t raw
 [ro] Raw image of register on read; actual value on write
uint8_t swidthin
 [ro] Size of the inbound serial data capability.
uint8_t swidthout
 [ro] Size of the outbound serial data capability.
uint8_t serialHalt
 [ro] Serial logic in halted state
uint8_t pllUnlock
 [ro] The SerDes PLL is not locked
uint8_t rPend
 [ro] Remote Request Pending
uint8_t iFlow
 [ro] Inbound flow control is blocking outbound data
uint8_t oFlow
 [ro] Outbound flow control has been requested
uint8_t rError
 [rw] Remote uncorrectable error
uint8_t lError
 [rw] Local uncorrectable error.
uint8_t nfEmpty3
 [ro] FIFO 3 (Slave Commands) is not empty
uint8_t nfEmpty2
 [ro] FIFO 2 (Slave Data) is not empty
uint8_t nfEmpty1
 [ro] FIFO 1 (Master Commands) is not empty
uint8_t nfEmpty0
 [ro] FIFO 0 (Master Data) is not empty
uint8_t sPend
 [ro] There are pending slave requests
uint8_t mPend
 [ro] There are pending master requests
uint8_t link
 [ro] The serial interface is working

Detailed Description

Specification of the HyperLink Status Register.

The Status Register is used to detect conditions that may be of interest to the system designer


Field Documentation

[ro] Inbound flow control is blocking outbound data

Field size: 1 bit

Indicates that a flow control enable request has been received and has stalled transmit until a flow control disable request is received.

[rw] Local uncorrectable error.

Field size: 1 bit

This bit indicates that an inbound packet contains an uncorrectable ECC error. This bit is cleared by writing a one to it after the error has been corrected. When set by the peripheral, this bit will cause an interrupt if enabled in hyplnkControlReg_t::statusIntEnable.

This error indicate a catastrophic failure and that the receive link is down. The hyplnkControlReg_t::reset bit must be toggled to recover from this error. It is possible that returning transactions may have been lost in which case a device reset maybe necessary to recover.

[ro] The serial interface is working

Field size: 1 bit

[ro] There are pending master requests

Field size: 1 bit

[ro] FIFO 0 (Master Data) is not empty

Field size: 1 bit

[ro] FIFO 1 (Master Commands) is not empty

Field size: 1 bit

[ro] FIFO 2 (Slave Data) is not empty

Field size: 1 bit

[ro] FIFO 3 (Slave Commands) is not empty

Field size: 1 bit

[ro] Outbound flow control has been requested

Field size: 1 bit

Indicates that a flow control enable request has been received and has stalled transmit until a flow control disable request is received.

[ro] The SerDes PLL is not locked

Field size: 1 bit

This disables all serial operations

[rw] Remote uncorrectable error

Field size: 1 bit

This bit indicates that a downstream HyperLink module has detected an uncorrectable ECC error. This bit is set when an ECC status is received from the management interface. This bit is cleared by writing a one to it and the remote serial interface has been reset.

When this bit is set by the peripheral, an interrupt will occur if enabled in hyplnkControlReg_t::statusIntEnable. The remote device will need to perform a serial reset hyplnkControlReg_t::reset or device reset to recover from this catastrophic failure. Since this indicates that a transaction has been lost, if the rPend bit is set along with this bit, it is possible that this device will also require a reset as a transaction from this device may have been lost.

[ro] Remote Request Pending

Field size: 1 bit

The user should monitor this bit after setting hyplnkControlReg_t::serialStop and before changing hyplnkControlReg_t::iLoop or hyplnkControlReg_t::reset bits

[ro] Serial logic in halted state

Field size: 1 bit

This could be because hyplnkControlReg_t::reset, hyplnkControlReg_t::serialStop, or pllUnlock are active

[ro] There are pending slave requests

Field size: 1 bit

[ro] Size of the inbound serial data capability.

Field size: 4 bits

[ro] Size of the outbound serial data capability.

Field size: 4 bits


The documentation for this struct was generated from the following file:

Copyright 2012, Texas Instruments Incorporated