BWMNGMT

Modules

 BWMNGMT Enumerated Data Types
 BWMNGMT Data Structures
 BWMNGMT Symbols Defined
 BWMNGMT Functions

Detailed Description

Introduction

Overview

This page describes the Functions, Data Structures, Enumerations and Macros within BWMNGMT module.

The Bandwidth management module is used to avoid the case of a requestor (CPU, SDMA,IDMA, and Coherence Operations) being blocked from accessing a resource (L1P, L1D, L2, and configuration bus) for a long period of time.

The following four resources are managed by the BWM control hardware: -Level 1 Program (L1P) SRAM/Cache -Level 1 Data (L1D) SRAM/Cache -Level 2 (L2) SRAM/Cache -Memory-mapped registers configuration bus

References

  1. TMS320C64x+ DSP Megamodule Reference Guide SPRU871I (May 2008)

Assumptions

The abbreviation BWMNGMT has been used throughout this document to refer to the C64Plus Bandwidth Management Module. ============================================================================


Copyright 2012, Texas Instruments Incorporated