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Hardware setup structure. More...
#include <csl_tmr.h>
Hardware setup structure.
CLKSRC determines the selected clock source for the timer
CLKSRC determines the selected clock source for the timer
Clock/Pulse mode for timerHigh output
Clock/Pulse mode for timerLow output
Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin
Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin
Timer output inverter control
Timer output inverter control
TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0
TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0
CNTHI pre-scalar counter specifies the count for CNTHI
Pulse width. used in pulse mode (C/P_=0) by the timer
Pulse width. used in pulse mode (C/P_=0) by the timer
32 bit load value to be loaded to Timer Counter Register High
32 bit load value to be loaded to Timer Counter Register Low
Configures the GP timer in GP mode or in general purpose timer mode or Dual 32 bit timer mode
32 bit load value to be loaded to Timer Period Register High
32 bit load value to be loaded to Timer Period Register low