# TIMER

## Modules
| TIMER Symbols Defined
| TIMER Data Structures
| TIMER Functions
| TIMER Enumerated Data Types

## Detailed Description

## Introduction

### Overview

The timer can be configured as a general-purpose 64-bit timer, dual general-purpose 32-bit timers, or a watchdog timer. When configured as a dual 32-bit timers, each half can operate in conjunction (chain mode) or independently (unchained mode) of each other. The timer can be configured in one of three modes using the timer mode (TIMMODE) bits in the timer global control register (TGCR): a 64-bit general-purpose (GP) timer, dual 32-bit timers (Timer Low and Timer High), or a watchdog timer. When configured as dual 32-bit timers, each half can operate dependently (chain mode) or independently (unchained mode) of each other. At reset, the timer is configured as a 64-bit GP timer. The watchdog timer function can be enabled if desired, via the TIMMODE bits in timer global control register (TGCR) and WDEN bit in the watchdog timer control register WDTCR). Once the timer is configured as a watchdog timer, it cannot be reconfigured as a regular timer until a device reset occurs. The timer has one input pin (TINPL) and one output pin (TOUTL). The timer control register (TCR) controls the function of the input and output pin. The timers can be used to: time events, count events, generate pulses, interrupt the CPU, and send synchronization events to the EDMA.

### References

1. Timer User's Guide SPRU818.pdf (December 2005)

Copyright 2012, Texas Instruments Incorporated