# TSIP

## Modules
| TSIP Symbols Defined
| TSIP Data Structures
| TSIP Functions
| TSIP Enumerated Data Types

## Detailed Description

## Introduction

### Overview

This page describes the Functions, Data Structures, Enumerations and Macros within TSIP module.

The TSIP is a serial interface peripheral with timeslot data management and an integrated DMA capability. The primary purpose of this peripheral is to provide a glueless interface to common telecom serial data streams and efficient internal routing of the data to designated memories in a multi-CPU device.

The TSIP provides 8 serial transmit pins and 8 serial receive pins that connect directly to TEMUX devices. Internally the TSIP offers multiple channels of timeslot data management and multichannel DMA capability that allow individual timeslots to be selectively processed.

The 3 TSIPs are controlled by 3 different LPSCs. TSIP0 is controlled by LPSC10. TSIP1 is controlled by LPSC11. TSIP2 is controlled by LPSC12. This is done so that TSIPs can be independently clock gated.

### References

1. CSL-001-DES, CSL 3.x Design Specification DocumentVersion 1.02

Copyright 2012, Texas Instruments Incorporated