CSL_TmrHwSetup Struct Reference
[TIMER Data Structures]

Hardware setup structure. More...

#include <csl_tmr.h>

Data Fields

Uint32 tmrTimerPeriodLo
Uint32 tmrTimerPeriodHi
Uint32 tmrTimerCounterLo
Uint32 tmrTimerCounterHi
CSL_TmrIpGate tmrIpGateHi
CSL_TmrClksrc tmrClksrcHi
CSL_TmrPulseWidth tmrPulseWidthHi
CSL_TmrClockPulse tmrClockPulseHi
CSL_TmrInvInp tmrInvInpHi
CSL_TmrInvOutp tmrInvOutpHi
CSL_TmrIpGate tmrIpGateLo
CSL_TmrClksrc tmrClksrcLo
CSL_TmrPulseWidth tmrPulseWidthLo
CSL_TmrClockPulse tmrClockPulseLo
CSL_TmrInvInp tmrInvInpLo
CSL_TmrInvOutp tmrInvOutpLo
Uint8 tmrPreScalarCounterHi
CSL_TmrMode tmrTimerMode

Detailed Description

Hardware setup structure.


Field Documentation

CLKSRC determines the selected clock source for the timer

CLKSRC determines the selected clock source for the timer

Clock/Pulse mode for timerHigh output

Clock/Pulse mode for timerLow output

Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin

Timer input inverter control. Only affects operation if CLKSRC=1, Timer Input pin

Timer output inverter control

Timer output inverter control

TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0

TIEN determines if the timer clock is gated by the timer input. Applicable only when CLKSRC=0

CNTHI pre-scalar counter specifies the count for CNTHI

Pulse width. used in pulse mode (C/P_=0) by the timer

Pulse width. used in pulse mode (C/P_=0) by the timer

32 bit load value to be loaded to Timer Counter Register High

32 bit load value to be loaded to Timer Counter Register Low

Configures the GP timer in GP mode or in general purpose timer mode or Dual 32 bit timer mode

32 bit load value to be loaded to Timer Period Register High

32 bit load value to be loaded to Timer Period Register low


The documentation for this struct was generated from the following file:

Copyright 2012, Texas Instruments Incorporated