### - p -

- p0AStatEnable : CSL_CPSW_3GF_PORTSTAT
- p0BStatEnable : CSL_CPSW_3GF_PORTSTAT
- p0Enable : CSL_CPSW_3GF_CONTROL
- p0FlowEnable : CSL_CPSW_3GF_FLOWCNTL
- p0PassPriTag : CSL_CPSW_3GF_CONTROL
- p0PtypeEsc : CSL_CPSW_3GF_PTYPE
- p1FlowEnable : CSL_CPSW_3GF_FLOWCNTL
- p1PassPriTag : CSL_CPSW_3GF_CONTROL
- p1PtypeEsc : CSL_CPSW_3GF_PTYPE
- p1StatEnable : CSL_CPSW_3GF_PORTSTAT
- p2FlowEnable : CSL_CPSW_3GF_FLOWCNTL
- p2PassPriTag : CSL_CPSW_3GF_CONTROL
- p2PtypeEsc : CSL_CPSW_3GF_PTYPE
- p2StatEnable : CSL_CPSW_3GF_PORTSTAT
- paramNum : CSL_Edma3HwDmaChannelSetup , CSL_Edma3HwQdmaChannelSetup
- phyAddr : CSL_MDIO_USERACCESS , CSL_MDIO_USERPHYSEL
- portMask : CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY , CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY
- portNo : CSL_CPTS_EVENTINFO
- portNumber : CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY , CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY
- portState : CSL_CPSW_3GF_ALE_PORTCONTROL
- PRDHI : CSL_TmrConfig
- PRDLO : CSL_TmrConfig
- pri : CSL_Edma3CmdQuePri
- priority : CSL_BWMNGMT_MDMAPRI_SETUP , CSL_BWMNGMT_CPUARB_SETUP , CSL_IDMA_IDMA1CONFIG

Copyright 2012, Texas Instruments Incorporated