CPSW_3GF Functions
[Ethernet switch submodule (CPSW_3GF)]

Functions

CSL_IDEF_INLINE void CSL_CPSW_3GF_getCpswVersionInfo (CSL_CPSW_3GF_VERSION *pVersionInfo)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isFIFOLoopbackEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableFIFOLoopback (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableFIFOLoopback (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isVlanAwareEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableVlanAware (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableVlanAware (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort0Enabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort0 (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort0 (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort0PassPriTagEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort0PassPriTag (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort0PassPriTag (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort1PassPriTagEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort1PassPriTag (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort1PassPriTag (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort2PassPriTagEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort2PassPriTag (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort2PassPriTag (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getCpswControlReg (CSL_CPSW_3GF_CONTROL *pControlRegInfo)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setCpswControlReg (CSL_CPSW_3GF_CONTROL *pControlRegInfo)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getEmulationControlReg (Uint32 *pFree, Uint32 *pSoft)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setEmulationControlReg (Uint32 free, Uint32 soft)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortStatsEnableReg (CSL_CPSW_3GF_PORTSTAT *pPortStatsCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortStatsEnableReg (CSL_CPSW_3GF_PORTSTAT *pPortStatsCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPrioTypeReg (CSL_CPSW_3GF_PTYPE *pTypeCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPrioTypeReg (CSL_CPSW_3GF_PTYPE *pTypeCfg)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getShortGapThreshold (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setShortGapThreshold (Uint32 gapThreshVal)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getTxStartWordsReg (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setTxStartWordsReg (Uint32 startWordsVal)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getFlowControlReg (CSL_CPSW_3GF_FLOWCNTL *pFlowControlCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setFlowControlReg (CSL_CPSW_3GF_FLOWCNTL *pFlowControlCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getCppiSourceIdReg (Uint32 *pTxASrcId, Uint32 *pTxBSrcId)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setCppiSourceIdReg (Uint32 txASrcId, Uint32 txBSrcId)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPort0VlanReg (Uint32 *pPortVID, Uint32 *pPortCFI, Uint32 *pPortPRI)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0VlanReg (Uint32 portVID, Uint32 portCFI, Uint32 portPRI)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPort0RxPriMapReg (Uint32 *pPortRxPriMap)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0RxPriMapReg (Uint32 *pPortRxPriMap)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getPort0RxMaxLen (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0RxMaxLen (Uint32 rxMaxLen)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortMaxBlocksReg (Uint32 portNum, Uint32 *pRxMaxBlks, Uint32 *pTxMaxBlks)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortMaxBlocksReg (Uint32 portNum, Uint32 rxMaxBlks, Uint32 txMaxBlks)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortBlockCountReg (Uint32 portNum, Uint32 *pRxBlkCnt, Uint32 *pTxBlkCnt)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortVlanReg (Uint32 portNum, Uint32 *pPortVID, Uint32 *pPortCFI, Uint32 *pPortPRI)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortVlanReg (Uint32 portNum, Uint32 portVID, Uint32 portCFI, Uint32 portPRI)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTxPriMapReg (Uint32 portNum, Uint32 *pPortTxPriMap)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTxPriMapReg (Uint32 portNum, Uint32 *pPortTxPriMap)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortMACAddress (Uint32 portNum, Uint8 *pMacAddress)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortMACAddress (Uint32 portNum, Uint8 *pMacAddress)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncCntlReg (Uint32 portNum, CSL_CPSW_3GF_TSCNTL *pTimeSyncCntlCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncCntlReg (Uint32 portNum, CSL_CPSW_3GF_TSCNTL *pTimeSyncCntlCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncSeqIdReg (Uint32 portNum, Uint32 *pTsLtype, Uint32 *pTsSeqIdOffset)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncSeqIdReg (Uint32 portNum, Uint32 tsLtype, Uint32 tsSeqIdOffset)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncVlanLTypeReg (Uint32 portNum, Uint32 *pTsVlanLtype1, Uint32 *pTsVlanLtype2)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncVlanLTypeReg (Uint32 portNum, Uint32 tsVlanLtype1, Uint32 tsVlanLtype2)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getStats (CSL_CPSW_3GF_STATS *pCpswStats)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVersionInfo (CSL_CPSW_3GF_ALE_VERSION *pVersionInfo)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleRateLimitEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleRateLimit (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleRateLimit (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleMacAuthModeEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleMacAuthMode (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleMacAuthMode (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleVlanAwareEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleVlanAware (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleVlanAware (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleTxRateLimitEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleTxRateLimit (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleTxRateLimit (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleBypassEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleBypass (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleBypass (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleOUIDenyModeEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleOUIDenyMode (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleOUIDenyMode (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleVID0ModeEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleVID0Mode (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleVID0Mode (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleLearnNoVIDEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleLearnNoVID (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleLearnNoVID (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_startAleAgeOutNow (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleAgeOutDone (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_clearAleTable (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleEnabled (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAle (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAle (void)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getAleControlReg (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleControlReg (Uint32 aleCtrlVal)
CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getAlePrescaleReg (void)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAlePrescaleReg (Uint32 alePrescaleVal)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleUnkownVlanReg (Uint32 *pUnVlanMemList, Uint32 *pUnMcastFloodMask, Uint32 *pUnRegMcastFloodMask, Uint32 *pUnForceUntagEgress)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleUnkownVlanReg (Uint32 unVlanMemList, Uint32 unMcastFloodMask, Uint32 unRegMcastFloodMask, Uint32 unForceUntagEgress)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleTableEntry (Uint32 index, Uint32 *pAleInfoWd0, Uint32 *pAleInfoWd1, Uint32 *pAleInfoWd2)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleTableEntry (Uint32 index, Uint32 aleInfoWd0, Uint32 aleInfoWd1, Uint32 aleInfoWd2)
CSL_IDEF_INLINE
CSL_CPSW_3GF_ALE_ENTRYTYPE 
CSL_CPSW_3GF_getALEEntryType (Uint32 index)
CSL_IDEF_INLINE
CSL_CPSW_3GF_ALE_ADDRTYPE 
CSL_CPSW_3GF_getALEAddressType (Uint32 index)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleMcastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY *pMcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleMcastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY *pMcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanMcastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY *pVlanMcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanMcastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY *pVlanMcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleUnicastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY *pUcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleUnicastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY *pUcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleOUIAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_OUIADDR_ENTRY *pOUIAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleOUIAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_OUIADDR_ENTRY *pOUIAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanUnicastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY *pVlanUcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanUnicastAddrEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY *pVlanUcastAddrCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLAN_ENTRY *pVlanCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanEntry (Uint32 index, CSL_CPSW_3GF_ALE_VLAN_ENTRY *pVlanCfg)
CSL_IDEF_INLINE void CSL_CPSW_3GF_clearAleEntry (Uint32 index)
CSL_IDEF_INLINE void CSL_CPSW_3GF_getAlePortControlReg (Uint32 portNo, CSL_CPSW_3GF_ALE_PORTCONTROL *pPortControlInfo)
CSL_IDEF_INLINE void CSL_CPSW_3GF_setAlePortControlReg (Uint32 portNo, CSL_CPSW_3GF_ALE_PORTCONTROL *pPortControlInfo)

Function Documentation

CSL_IDEF_INLINE void CSL_CPSW_3GF_clearAleEntry ( Uint32  index  ) 

============================================================================
CSL_CPSW_3GF_clearAleEntry

Description
This function clears the ALE entry corresponding to the index specified

Arguments

        index                   ALE table index.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0=0, CPSW_3GF_ALE_TABLE_WORD1=0, CPSW_3GF_ALE_TABLE_WORD2=0

Example

        Uint32                              index;

        index   =   0;

        CSL_CPSW_3GF_clearAleEntry (index);
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_clearAleTable ( void   ) 

============================================================================
CSL_CPSW_3GF_clearAleTable

Description
This function initiates a full ALE table cleanup. The ALE hardware clears all table entries.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_CLEAR_TABLE=1

Example

 
        CSL_CPSW_3GF_clearAleTable ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAle ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAle

Description
This function configures the ALE control register to disable ALE processing.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_ALE=0

Example

 
        CSL_CPSW_3GF_disableAle ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleBypass ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleBypass

Description
This function configures the ALE control register to disable Bypass mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ALE_BYPASS=0

Example

 
        CSL_CPSW_3GF_disableAleBypass ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleLearnNoVID ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleLearnNoVID

Description
This function configures the ALE control register to enable VLAN Id learning.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_LEARN_NO_VID=0

Example

 
        CSL_CPSW_3GF_disableAleLearnNoVID ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleMacAuthMode ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleMacAuthMode

Description
This function configures the ALE control register to disable MAC authorization mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_AUTH_MODE=0

Example

 
        CSL_CPSW_3GF_disableAleMacAuthMode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleOUIDenyMode ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleOUIDenyMode

Description
This function configures the ALE control register to disable OUI deny mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_OUI_DENY=0

Example

 
        CSL_CPSW_3GF_disableAleOUIDenyMode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleRateLimit ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleRateLimit

Description
This function configures the ALE control register to disable multicast, broadcast rate limiting.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_RATE_LIMIT=0

Example

 
        CSL_CPSW_3GF_disableAleRateLimit ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleTxRateLimit ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleTxRateLimit

Description
This function configures the ALE control register to disable Tx rate limiting.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_RATE_LIMIT_TX=0

Example

 
        CSL_CPSW_3GF_disableAleTxRateLimit ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleVID0Mode ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleVID0Mode

Description
This function configures the ALE control register to disable VID0 mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_EN_VID0_MODE=0

Example

 
        CSL_CPSW_3GF_disableAleVID0Mode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableAleVlanAware ( void   ) 

============================================================================
CSL_CPSW_3GF_disableAleVlanAware

Description
This function configures the ALE control register to disable VLAN aware mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ALE_VLAN_AWARE=0

Example

 
        CSL_CPSW_3GF_disableAleVlanAware ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableFIFOLoopback ( void   ) 

============================================================================
CSL_CPSW_3GF_disableFIFOLoopback

Description
This function configures the CPSW control register to disable FIFO loopback mode

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_FIFO_LOOPBACK=0

Example

 
        CSL_CPSW_3GF_disableFIFOLoopback ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort0 ( void   ) 

============================================================================
CSL_CPSW_3GF_disablePort0

Description
This function configures the CPSW control register to disable the Port 0.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P0_ENABLE=0

Example

 
        CSL_CPSW_3GF_disablePort0 ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort0PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_disablePort0PassPriTag

Description
This function configures the CPSW control register to disable the Ingress priority tagging on Port 0.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P0_PASS_PRI_TAGGED=0

Example

 
        CSL_CPSW_3GF_disablePort0PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort1PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_disablePort1PassPriTag

Description
This function configures the CPSW control register to disable the Ingress priority tagging on Port 1.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P1_PASS_PRI_TAGGED=0

Example

 
        CSL_CPSW_3GF_disablePort1PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disablePort2PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_disablePort2PassPriTag

Description
This function configures the CPSW control register to disable the Ingress priority tagging on Port 2.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P2_PASS_PRI_TAGGED=0

Example

 
        CSL_CPSW_3GF_disablePort2PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_disableVlanAware ( void   ) 

============================================================================
CSL_CPSW_3GF_disableVlanAware

Description
This function configures the CPSW control register to disable VLAN aware mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_VLAN_AWARE=0

Example

 
        CSL_CPSW_3GF_disableVlanAware ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAle ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAle

Description
This function configures the ALE control register to enable ALE processing.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_ALE=1

Example

 
        CSL_CPSW_3GF_enableAle ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleBypass ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleBypass

Description
This function configures the ALE control register to enable Bypass mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ALE_BYPASS=1

Example

 
        CSL_CPSW_3GF_enableAleBypass ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleLearnNoVID ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleLearnNoVID

Description
This function configures the ALE control register to enable VLAN Id No Learn, i.e., disable VLAN Id learning.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_LEARN_NO_VID=1

Example

 
        CSL_CPSW_3GF_enableAleLearnNoVID ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleMacAuthMode ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleMacAuthMode

Description
This function configures the ALE control register to enable MAC authorization mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_AUTH_MODE=1

Example

 
        CSL_CPSW_3GF_enableAleMacAuthMode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleOUIDenyMode ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleOUIDenyMode

Description
This function configures the ALE control register to enable OUI deny mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_OUI_DENY=1

Example

 
        CSL_CPSW_3GF_enableAleOUIDenyMode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleRateLimit ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleRateLimit

Description
This function configures the ALE control register to enable multicast, broadcast rate limiting.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ENABLE_RATE_LIMIT=1

Example

 
        CSL_CPSW_3GF_enableAleRateLimit ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleTxRateLimit ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleTxRateLimit

Description
This function configures the ALE control register to enable Tx rate limiting.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_RATE_LIMIT_TX=1

Example

 
        CSL_CPSW_3GF_enableAleTxRateLimit ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleVID0Mode ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleVID0Mode

Description
This function configures the ALE control register to enable VID0 mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_EN_VID0_MODE=1

Example

 
        CSL_CPSW_3GF_enableAleVID0Mode ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableAleVlanAware ( void   ) 

============================================================================
CSL_CPSW_3GF_enableAleVlanAware

Description
This function configures the ALE control register to enable VLAN aware mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_ALE_VLAN_AWARE=1

Example

 
        CSL_CPSW_3GF_enableAleVlanAware ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableFIFOLoopback ( void   ) 

============================================================================
CSL_CPSW_3GF_enableFIFOLoopback

Description
This function configures the CPSW control register to enable FIFO loopback mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_FIFO_LOOPBACK=1

Example

 
        CSL_CPSW_3GF_enableFIFOLoopback ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort0 ( void   ) 

============================================================================
CSL_CPSW_3GF_enablePort0

Description
This function configures the CPSW control register to enable the Port 0.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P0_ENABLE=1

Example

 
        CSL_CPSW_3GF_enablePort0 ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort0PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_enablePort0PassPriTag

Description
This function configures the CPSW control register to enable the Ingress priority tagging on Port 0.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P0_PASS_PRI_TAGGED=1

Example

 
        CSL_CPSW_3GF_enablePort0PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort1PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_enablePort1PassPriTag

Description
This function configures the CPSW control register to enable the Ingress priority tagging on Port 1.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P1_PASS_PRI_TAGGED=1

Example

 
        CSL_CPSW_3GF_enablePort1PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enablePort2PassPriTag ( void   ) 

============================================================================
CSL_CPSW_3GF_enablePort2PassPriTag

Description
This function configures the CPSW control register to enable the Ingress priority tagging on Port 2.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_P2_PASS_PRI_TAGGED=1

Example

 
        CSL_CPSW_3GF_enablePort2PassPriTag ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_enableVlanAware ( void   ) 

============================================================================
CSL_CPSW_3GF_enableVlanAware

Description
This function configures the CPSW control register to enable VLAN aware mode.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_CPSW_CONTROL_REG_VLAN_AWARE=1

Example

 
        CSL_CPSW_3GF_enableVlanAware ();
	 
     

=============================================================================

CSL_IDEF_INLINE CSL_CPSW_3GF_ALE_ADDRTYPE CSL_CPSW_3GF_getALEAddressType ( Uint32  index  ) 

============================================================================
CSL_CPSW_3GF_getALEAddressType

Description
This function returns the address type of an ALE entry.

Arguments

        index                   ALE table index to be read.
 *	 

Return Value CSL_CPSW_3GF_ALE_ADDRTYPE
ALE_ADDRTYPE_UCAST Address at this entry is unicast
ALE_ADDRTYPE_MCAST Address at this entry is multicast
ALE_ADDRTYPE_OUI Address at this entry is OUI address

Pre Condition
This function must be called only for an ALE address entry, i.e., if CSL_CPSW_3GF_getALEEntryType () returns ALE_ENTRYTYPE_ADDRESS or ALE_ENTRYTYPE_VLANADDRESS only.

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0_REG, CPSW_3GF_ALE_TABLE_WORD1_REG

Example

 *      Uint32      index = 0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_ADDRESS)
        {
            // ALE entry has an address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_UCAST)
            {
                // Unicast address
            }
        }
        else
        {
            // Do nothing
        }

        ...
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getAleControlReg ( void   ) 

============================================================================
CSL_CPSW_3GF_getAleControlReg

Description
This function retrieves the contents of the ALE control register.

Arguments
None

Return Value
>=0 ALE control register contents.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG

Example

        Uint32      aleCtrlVal;
 
        aleCtrlVal  =   CSL_CPSW_3GF_getAleControlReg ();
	 
     

=============================================================================

CSL_IDEF_INLINE CSL_CPSW_3GF_ALE_ENTRYTYPE CSL_CPSW_3GF_getALEEntryType ( Uint32  index  ) 

============================================================================
CSL_CPSW_3GF_getALEEntryType

Description
This function returns the ALE entry type for any given ALE table entry index.

Arguments

        index                   ALE table index to be read.
 *	 

Return Value CSL_CPSW_3GF_ALE_ENTRYTYPE
ALE_ENTRYTYPE_FREE ALE entry is free.
ALE_ENTRYTYPE_ADDRESS ALE entry contains a unicast/multicast address.
ALE_ENTRYTYPE_VLAN VLAN ALE entry.
ALE_ENTRYTYPE_VLANADDRESS VLAN Address Entry.

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD1_REG

Example

 *      Uint32      index = 0;
        if (CSL_CPSW_3GF_getALEEntryType () == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry free
        }
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleMcastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY pMcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_getAleMcastAddrEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with Multicast address configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pMcastAddrCfg           ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                              index;
        CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY    mcastAddrCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_ADDRESS)
        {
            // ALE entry has an address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_MCAST)
            {
                // Read Multicast address config from hardware
                CSL_CPSW_3GF_getAleMcastAddrEntry (index, &mcastAddrCfg);
            }
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleOUIAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_OUIADDR_ENTRY pOUIAddrCfg 
)

============================================================================
CSL_CPSW_3GF_getAleOUIAddrEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with OUI address configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pOUIAddrCfg             ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_OUIADDR_ENTRY          ouiAddrCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_ADDRESS)
        {
            // ALE entry has an address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_UCAST)
            {
                // Read Unicast address config from hardware
                CSL_CPSW_3GF_getAleOUIAddrEntry (index, &ouiAddrCfg);
            }
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAlePortControlReg ( Uint32  portNo,
CSL_CPSW_3GF_ALE_PORTCONTROL pPortControlInfo 
)

============================================================================
CSL_CPSW_3GF_getAlePortControlReg

Description
This function retrieves the contents of ALE Port control register corresponding to the port number specified.

Arguments

        portNo                  Port number for which the ALE port control register
                                must be read.
        pPortControlInfo        CSL_CPSW_3GF_ALE_PORTCONTROL structure that needs to be 
                                filled with Port control register info read from
                                the hardware.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_PORT_CONTROL_REG_PORT_STATE, CPSW_3GF_ALE_PORT_CONTROL_REG_DROP_UNTAGGED, CPSW_3GF_ALE_PORT_CONTROL_REG_VID_INGRESS_CHECK, CPSW_3GF_ALE_PORT_CONTROL_REG_NO_LEARN, CPSW_3GF_ALE_PORT_CONTROL_REG_MCAST_LIMIT, CPSW_3GF_ALE_PORT_CONTROL_REG_BCAST_LIMIT

Example

        Uint32                          index;
        CSL_CPSW_3GF_ALE_PORTCONTROL    portControlInfo;

        index   =   0;
 
        CSL_CPSW_3GF_getAlePortControlReg (index, &portControlInfo);
	 
     

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getAlePrescaleReg ( void   ) 

============================================================================
CSL_CPSW_3GF_getAlePrescaleReg

Description
This function retrieves the contents of the ALE Prescale register.

Arguments
None

Return Value
>=0 ALE prescale register contents.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_PRESCALE_REG_ALE_PRESCALE

Example

        Uint32      alePrescaleVal;
 
        alePrescaleVal  =   CSL_CPSW_3GF_getAlePrescaleReg ();
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleTableEntry ( Uint32  index,
Uint32 *  pAleInfoWd0,
Uint32 *  pAleInfoWd1,
Uint32 *  pAleInfoWd2 
)

============================================================================
CSL_CPSW_3GF_getAleTableEntry

Description
This function retrieves an ALE table entry corresponding to the ALE entry index specified in 'index' input parameter. The ALE entry values corresponding to the ALE_TBLW0, ALE_TBLW1 and ALE_TBLW2 registers are returned in 'pAleInfoWd0', 'pAleInfoWd1', 'pAleInfoWd2' output parameters.

Arguments

        index                   ALE table index to be read.
        pAleInfoWd0             Contents of ALE Table Word 0 Register (ALE_TBLW0).
        pAleInfoWd1             Contents of ALE Table Word 1 Register (ALE_TBLW1).
        pAleInfoWd2             Contents of ALE Table Word 2 Register (ALE_TBLW2).
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0_REG_ENTRY_31_0, CPSW_3GF_ALE_TABLE_WORD1_REG_ENTRY_63_32, CPSW_3GF_ALE_TABLE_WORD2_REG_ENTRY_71_64

Example

        Uint32      index, info0, info1, info2;

        index   =   0;
 
        CSL_CPSW_3GF_getAleUnkownVlanReg (index, 
                                          &info0,
                                          &info1,
                                          &info2);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleUnicastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY pUcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_getAleUnicastAddrEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with Unicast address configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pUcastAddrCfg           ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY      ucastAddrCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_ADDRESS)
        {
            // ALE entry has an address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_UCAST)
            {
                // Read Unicast address config from hardware
                CSL_CPSW_3GF_getAleUnicastAddrEntry (index, &ucastAddrCfg);
            }
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleUnkownVlanReg ( Uint32 *  pUnVlanMemList,
Uint32 *  pUnMcastFloodMask,
Uint32 *  pUnRegMcastFloodMask,
Uint32 *  pUnForceUntagEgress 
)

============================================================================
CSL_CPSW_3GF_getAleUnkownVlanReg

Description
This function retrieves the contents of the ALE Unknown VLAN register.

Arguments

        pUnVlanMemList          Unknown VLAN member list.
        pUnMcastFloodMask       Unknown VLAN Multicast flood mask.
        pUnRegMcastFloodMask    Unknown VLAN Registered Multicast Flood mask.
        pUnForceUntagEgress     Unknown VLAN Force Untagged Egress.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_VLAN_MEMBER_LIST, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_MCAST_FLOOD_MASK, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_REG_MCAST_FLOOD_MASK, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_FORCE_UNTAGGED_EGRESS

Example

        Uint32      unVlanMemList, unMcastFloodMask, unRegMcastFloodMask, unForceUntagEgress;
 
        CSL_CPSW_3GF_getAleUnkownVlanReg (&unVlanMemList, 
                                          &unMcastFloodMask,
                                          &unRegMcastFloodMask,
                                          &unForceUntagEgress);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVersionInfo ( CSL_CPSW_3GF_ALE_VERSION pVersionInfo  ) 

============================================================================
CSL_CPSW_3GF_getAleVersionInfo

Description
This function retrieves the ALE submodule identification and version information.

Arguments

        pVersionInfo        CSL_CPSW_3GF_ALE_VERSION structure that needs to be populated
                            with the ALE version info read from the hardware.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_ID_REG_ALE_MINOR_VER, CPSW_3GF_ALE_ID_REG_ALE_MAJOR_VER, CPSW_3GF_ALE_ID_REG_ALE_IDENT

Example

        CSL_CPSW_3GF_ALE_VERSION    versionInfo;

        CSL_CPSW_3GF_getAleVersionInfo (&versionInfo);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLAN_ENTRY pVlanCfg 
)

============================================================================
CSL_CPSW_3GF_getAleVlanEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with VLAN configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pVlanCfg                ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLAN_ENTRY             vlanCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_VLAN)
        {
            // ALE entry has a VLAN configuration
            CSL_CPSW_3GF_getAleVlanEntry (index, &vlanCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanMcastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY pVlanMcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_getAleVlanMcastAddrEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with VLAN Multicast address configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pVlanMcastAddrCfg       ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY    vlanMcastAddrCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_VLANADDRESS)
        {
            // ALE entry has a VLAN address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_MCAST)
            {
                // Read VLAN Multicast address config from hardware
                CSL_CPSW_3GF_getAleVlanMcastAddrEntry (index, &vlanMcastAddrCfg);
            }
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getAleVlanUnicastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY pVlanUcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_getAleVlanUnicastAddrEntry

Description
This function reads the ALE table entry for the index specified and fills the output parameter structure with VLAN Unicast address configuration read from the hardware.

Arguments

        index                   ALE table index to be read.
        pVlanUcastAddrCfg       ALE entry contents read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=0

Reads
CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY  vlanUcastAddrCfg;

        index   =   0;
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_VLANADDRESS)
        {
            // ALE entry has a VLAN address

            if (CSL_CPSW_3GF_getALEAddressType (index) ==  ALE_ADDRTYPE_UCAST)
            {
                // Read VLAN Unicast address config from hardware
                CSL_CPSW_3GF_getAleVlanUnicastAddrEntry (index, &ucvlanUcastAddrCfgastAddrCfg);
            }
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getCppiSourceIdReg ( Uint32 *  pTxASrcId,
Uint32 *  pTxBSrcId 
)

============================================================================
CSL_CPSW_3GF_getCppiSourceIdReg

Description
This function retrieves the contents of the CPPI Source Identification register.

Arguments

        pTxASrcId           CPPI Info Word0 Source Id Value on TxA.
        pTxBSrcId           CPPI Info Word0 Source Id Value on TxB.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P0_CPPI_SRC_ID_REG_TXA_SRC_ID, CPSW_3GF_P0_CPPI_SRC_ID_REG_TXB_SRC_ID

Example

 *      Uint32      txASrcId, txBSrcId;

        CSL_CPSW_3GF_getCppiSourceIdReg (&txASrcId, &txBSrcId);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getCpswControlReg ( CSL_CPSW_3GF_CONTROL pControlRegInfo  ) 

============================================================================
CSL_CPSW_3GF_getCpswControlReg

Description
This function retrieves the contents of the CPSW Control register.

Arguments

        pControlRegInfo     CSL_CPSW_CONTROL structure that needs to be populated
                            with the control register contents.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_FIFO_LOOPBACK, CPSW_3GF_CPSW_CONTROL_REG_VLAN_AWARE, CPSW_3GF_CPSW_CONTROL_REG_P0_ENABLE, CPSW_3GF_CPSW_CONTROL_REG_P0_PASS_PRI_TAGGED, CPSW_3GF_CPSW_CONTROL_REG_P1_PASS_PRI_TAGGED, CPSW_3GF_CPSW_CONTROL_REG_P2_PASS_PRI_TAGGED

Example

        CSL_CPSW_3GF_CONTROL    controlRegInfo;

        CSL_CPSW_3GF_getCpswControlReg (&controlRegInfo);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getCpswVersionInfo ( CSL_CPSW_3GF_VERSION pVersionInfo  ) 

============================================================================
CSL_CPSW_3GF_getCpswVersionInfo

Description
This function retrieves the CPSW identification and version information.

Arguments

        pVersionInfo        CSL_CPSW_3GF_VERSION structure that needs to be populated
                            with the version info read from the hardware.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_ID_VER_REG_CPSW_3GF_MINOR_VER, CPSW_3GF_CPSW_ID_VER_REG_CPSW_3GF_MAJ_VER, CPSW_3GF_CPSW_ID_VER_REG_CPSW_3GF_RTL_VER, CPSW_3GF_CPSW_ID_VER_REG_CPSW_3GF_IDENT

Example

        CSL_CPSW_3GF_VERSION    versionInfo;

        CSL_CPSW_3GF_getCpswVersionInfo (&versionInfo);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getEmulationControlReg ( Uint32 *  pFree,
Uint32 *  pSoft 
)

============================================================================
CSL_CPSW_3GF_getEmulationControlReg

Description
This function retrieves the contents of the CPSW Emulation Control register.

Arguments

        pFree                   Emulation free bit read from the hardware.
        pSoft                   Emulation soft bit read from the hardware.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_EM_CONTROL_REG_FREE, CPSW_3GF_EM_CONTROL_REG_SOFT

Example

        Uint32  free, soft;

        CSL_CPSW_3GF_getEmulationControlReg (&free, &soft);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getFlowControlReg ( CSL_CPSW_3GF_FLOWCNTL pFlowControlCfg  ) 

============================================================================
CSL_CPSW_3GF_getFlowControlReg

Description
This function retrieves the contents of the Flow control register.

Arguments

        pFlowControlCfg     CSL_CPSW_3GF_FLOWCNTL structure that needs to be populated
                            with contents of Flow control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_FLOW_CONTROL_REG_P0_FLOW_EN, CPSW_3GF_FLOW_CONTROL_REG_P1_FLOW_EN, CPSW_3GF_FLOW_CONTROL_REG_P2_FLOW_EN

Example

 *      CSL_CPSW_3GF_FLOWCNTL       flowControlCfg;

        CSL_CPSW_3GF_getFlowControlReg (&flowControlCfg);

	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getPort0RxMaxLen ( void   ) 

============================================================================
CSL_CPSW_3GF_getPort0RxMaxLen

Description
This function retrieves the contents of the Port 0 Receive Maximum Length Register.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_RX_MAXLEN_REG_RX_MAXLEN

Example

 *      Uint32      rxMaxLen;
 
        rxMaxLen    =   CSL_CPSW_3GF_getPort0RxMaxLen ();

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPort0RxPriMapReg ( Uint32 *  pPortRxPriMap  ) 

============================================================================
CSL_CPSW_3GF_getPort0RxPriMapReg

Description
This function retrieves the contents of the Port 0 Receive Packet Priority to Header Priority Mapping Register.

Arguments

        pPortRxPriMap           Array of Port 0 Rx priority map priority values 
                                read from the register.
 *	 

Return Value
None

Pre Condition
The input parameter 'pPortRxPriMap' must be large enough to hold all the 8 priority values read from the register.

Post Condition
None

Reads
CPSW_3GF_P0_RX_PRI_MAP_REG_PRI0, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI1, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI2, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI3, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI4, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI5, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI6, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI7

Example

 *      Uint32      port0RxPriMap [8];
 
        CSL_CPSW_3GF_getPort0RxPriMapReg (port0RxPriMap);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPort0VlanReg ( Uint32 *  pPortVID,
Uint32 *  pPortCFI,
Uint32 *  pPortPRI 
)

============================================================================
CSL_CPSW_3GF_getPort0VlanReg

Description
This function retrieves the contents of the Port 0 VLAN Register.

Arguments

        pPortVID                Port VLAN Id
        pPortCFI                Port CFI bit
        pPortPRI                Port VLAN priority (0-7, 7 is highest priority)
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P0_PORT_VLAN_REG_PORT_VID, CPSW_3GF_P0_PORT_VLAN_REG_PORT_CFI, CPSW_3GF_P0_PORT_VLAN_REG_PORT_PRI

Example

 *      Uint32      portVID, portCFI, portPRI;
 
        CSL_CPSW_3GF_getPort0VlanReg (&portVID, &portCFI, &portPRI);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortBlockCountReg ( Uint32  portNum,
Uint32 *  pRxBlkCnt,
Uint32 *  pTxBlkCnt 
)

============================================================================
CSL_CPSW_3GF_getPortBlockCountReg

Description
This function retrieves the contents of the Port Block Count register corresponding to the MAC port specified.

Arguments

        portNum                 MAC port number for which the block count
                                must be retrieved.
        pRxBlkCnt               Receive block count usage read for this port.                                
        pTxBlkCnt               Transmit block count usage read for this port.                                
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_BLK_CNT_REG_RX_BLK_CNT, CPSW_3GF_P_BLK_CNT_REG_TX_BLK_CNT

Example

 *      Uint32      rxBlkCnt, txBlkCnt, portNum;

        portNum =   1;            
 
        CSL_CPSW_3GF_getPortBlockCountReg (portNum, &rxBlkCnt, &txBlkCnt);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortMACAddress ( Uint32  portNum,
Uint8 *  pMacAddress 
)

============================================================================
CSL_CPSW_3GF_getPortMACAddress

Description
This function retreives the source MAC address corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the source MAC address
                                must be read and returned.
        pMacAddress             6 byte Source MAC address read.
 *	 

Return Value
None

Pre Condition
The input parameter 'pMacAddres' must be large enough the 6 byte MAC address returned by this API.

Post Condition
None

Reads
CPSW_3GF_SL_SA_LO_REG_MACSRCADDR_7_0, CPSW_3GF_SL_SA_LO_REG_MACSRCADDR_15_8, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_23_16, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_31_24, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_39_32, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_47_40

Example

 *      Uint8   macAddress [6], portNum;
 
        portNum =   1;
 
        CSL_CPSW_3GF_getPortMACAddress (portNum, macAddress);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortMaxBlocksReg ( Uint32  portNum,
Uint32 *  pRxMaxBlks,
Uint32 *  pTxMaxBlks 
)

============================================================================
CSL_CPSW_3GF_getPortMaxBlocksReg

Description
This function retrieves the contents of the Port Max Blocks Register corresponding to the MAC port specified.

Arguments

        portNum                 MAC port number for which the max block numbers
                                must be retrieved.
        pRxMaxBlks              Receive FIFO Maximum blocks read for this port.                                
        pTxMaxBlks              Transmit FIFO Maximum blocks read for this port.                                
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_MAX_BLKS_REG_RX_MAX_BLKS, CPSW_3GF_P_MAX_BLKS_REG_TX_MAX_BLKS

Example

 *      Uint32      rxMaxBlks, txMaxBlks, portNum;

        portNum =   1;            
 
        CSL_CPSW_3GF_getPortMaxBlocksReg (portNum, &rxMaxBlks, &txMaxBlks);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortStatsEnableReg ( CSL_CPSW_3GF_PORTSTAT pPortStatsCfg  ) 

============================================================================
CSL_CPSW_3GF_getPortStatsEnableReg

Description
This function retrieves the contents of the CPSW Port Statistics Enable register.

Arguments

        pPortStatsCfg       CSL_CPSW_3GF_PORTSTAT structure that needs to be populated
                            with the port statistics enable register contents.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_STAT_PORT_EN_REG_P0A_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P0B_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P1_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P2_STAT_EN

Example

        CSL_CPSW_3GF_PORTSTAT       portStatsCfg;

        CSL_CPSW_3GF_getPortStatsEnableReg (&portStatsCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncCntlReg ( Uint32  portNum,
CSL_CPSW_3GF_TSCNTL pTimeSyncCntlCfg 
)

============================================================================
CSL_CPSW_3GF_getPortTimeSyncCntlReg

Description
This function retreives the contents of Time sync control register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be read.
        pTimeSyncCntlCfg        CSL_CPSW_3GF_TSCNTL that needs to be populated with 
                                contents of time sync control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_TS_CTL_REG_TS_RX_EN, CPSW_3GF_P_TS_CTL_REG_TS_RX_VLAN_LTYPE1_EN, CPSW_3GF_P_TS_CTL_REG_TS_RX_VLAN_LTYPE2_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_VLAN_LTYPE1_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_VLAN_LTYPE2_EN, CPSW_3GF_P_TS_CTL_REG_TX_MSG_TYPE_EN_15_0

Example

 *      Uint32              portNum;
        CSL_CPSW_3GF_TSCNTL     tsCtlCfg;
 
        portNum =   1;
 
        CSL_CPSW_3GF_getPortTimeSyncCntlReg (portNum, &tsCtlCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncSeqIdReg ( Uint32  portNum,
Uint32 *  pTsLtype,
Uint32 *  pTsSeqIdOffset 
)

============================================================================
CSL_CPSW_3GF_getPortTimeSyncSeqIdReg

Description
This function retreives the contents of Time Sync Sequence Id and LTYPE register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be read.
        pTsLtype                Time sync LTYPE read.
        pTsSeqIdOffset          Time sync sequence Id offset read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_TS_SEQ_LTYPE_REG_TS_LTYPE, CPSW_3GF_P_TS_SEQ_LTYPE_REG_TS_SEQ_ID_OFFSET

Example

 *      Uint32              portNum, tsLtype, tsSeqIdOffset;
 
        portNum =   1;
 
        CSL_CPSW_3GF_getPortTimeSyncSeqIdReg (portNum, &tsLtype, &tsSeqIdOffset);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTimeSyncVlanLTypeReg ( Uint32  portNum,
Uint32 *  pTsVlanLtype1,
Uint32 *  pTsVlanLtype2 
)

============================================================================
CSL_CPSW_3GF_getPortTimeSyncVlanLTypeReg

Description
This function retreives the contents of Time Sync VLAN LTYPE register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be read.
        pTsVlanLtype1           Time sync VLAN LTYPE1 value read.
        pTsVlanLtype2           Time sync VLAN LTYPE2 value read.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_TS_VLAN_LTYPE_REG_TS_VLAN_LTYPE1, CPSW_3GF_P_TS_VLAN_LTYPE_REG_TS_VLAN_LTYPE2

Example

 *      Uint32              portNum, tsLtype1, tsLtype2;
 
        portNum =   1;
 
        CSL_CPSW_3GF_getPortTimeSyncVlanLTypeReg (portNum, &tsLtype1, &tsLtype2);
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortTxPriMapReg ( Uint32  portNum,
Uint32 *  pPortTxPriMap 
)

============================================================================
CSL_CPSW_3GF_getPortTxPriMapReg

Description
This function retrieves the contents of the Transmit Header Priority to Switch Priority Mapping Register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register contents
                                must be read and returned.
        pPortTxPriMap           Array of Port Tx priority map priority values 
                                read from the register.
 *	 

Return Value
None

Pre Condition
The input parameter 'pPortTxPriMap' must be large enough to hold all the 8 priority values read from the register.

Post Condition
None

Reads
CPSW_3GF_P_TX_PRI_MAP_REG_PRI0, CPSW_3GF_P_TX_PRI_MAP_REG_PRI1, CPSW_3GF_P_TX_PRI_MAP_REG_PRI2, CPSW_3GF_P_TX_PRI_MAP_REG_PRI3, CPSW_3GF_P_TX_PRI_MAP_REG_PRI4, CPSW_3GF_P_TX_PRI_MAP_REG_PRI5, CPSW_3GF_P_TX_PRI_MAP_REG_PRI6, CPSW_3GF_P_TX_PRI_MAP_REG_PRI7

Example

 *      Uint32      portTxPriMap [8], portNum;
 
        portNum =   1;
 
        CSL_CPSW_3GF_getPortTxPriMapReg (portNum, portTxPriMap);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPortVlanReg ( Uint32  portNum,
Uint32 *  pPortVID,
Uint32 *  pPortCFI,
Uint32 *  pPortPRI 
)

============================================================================
CSL_CPSW_3GF_getPortVlanReg

Description
This function retrieves the contents of the VLAN Register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the VLAN register 
                                contents must be read
        pPortVID                Port VLAN Id
        pPortCFI                Port CFI bit
        pPortPRI                Port VLAN priority (0-7, 7 is highest priority)
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_P_PORT_VLAN_REG_PORT_VID, CPSW_3GF_P_PORT_VLAN_REG_PORT_CFI, CPSW_3GF_P_PORT_VLAN_REG_PORT_PRI

Example

 *      Uint32      portVID, portCFI, portPRI, portNum;
 
        portNum =   2;
 
        CSL_CPSW_3GF_getPortVlanReg (portNum, &portVID, &portCFI, &portPRI);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getPrioTypeReg ( CSL_CPSW_3GF_PTYPE pTypeCfg  ) 

============================================================================
CSL_CPSW_3GF_getPrioTypeReg

Description
This function retrieves the contents of the CPSW Priority Type register.

Arguments

        pTypeCfg            CSL_CPSW_3GF_PTYPE structure that needs to be populated
                            with the priority type register contents.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_PTYPE_REG_ESC_PRI_LD_VAL, CPSW_3GF_PTYPE_REG_P0_PTYPE_ESC, CPSW_3GF_PTYPE_REG_P1_PTYPE_ESC, CPSW_3GF_PTYPE_REG_P2_PTYPE_ESC

Example

        CSL_CPSW_3GF_PTYPE       pTypeCfg;

        CSL_CPSW_3GF_getPrioTypeReg (&pTypeCfg);

	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getShortGapThreshold ( void   ) 

============================================================================
CSL_CPSW_3GF_getShortGapThreshold

Description
This function retrieves the contents of the CPSW MAC Short Gap Threshold register.

Arguments
None

Return Value
>=0 MAC short gap threshold value read from the hardware.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_GAP_THRESH_CPGMAC_SL_REG_GAP_THRESH

Example

 *      Uint32          gapThreshVal;

        gapThreshVal    =   CSL_CPSW_3GF_getShortGapThreshold ();

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_getStats ( CSL_CPSW_3GF_STATS pCpswStats  ) 

============================================================================
CSL_CPSW_3GF_getStats

Description
The CPSW stats are divided into 2 blocks, i.e., Stats for Host port (switch Port 0) and Stats for MAC ports (Port 1 and Port2). This function retreives hardware statistics for both the stat blocks.

Arguments

        pCpswStats              Array of CSL_CPSW_3GF_STATS structure that needs to be filled
                                with the stats read from the hardware. This function expects
                                that the array passed to it is big enough to hold the stats
                                for both stat blocks, i.e., size of array passed to this 
                                function must be 2.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_RXGOODFRAMES, CPSW_RXBROADCASTFRAMES, CPSW_RXMULTICASTFRAMES, CPSW_RXPAUSEFRAMES, CPSW_RXCRCERRORS, CPSW_RXALIGNCODEERRORS, CPSW_RXOVERSIZEDFRAMES, CPSW_RXJABBERFRAMES, CPSW_RXUNDERSIZEDFRAMES, CPSW_RXFRAGMENTS, CPSW_RXOCTETS, CPSW_TXGOODFRAMES, CPSW_TXBROADCASTFRAMES, CPSW_TXMULTICASTFRAMES, CPSW_TXPAUSEFRAMES, CPSW_TXDEFERREDFRAMES, CPSW_TXCOLLISIONFRAMES, CPSW_TXSINGLECOLLFRAMES, CPSW_TXMULTCOLLFRAMES, CPSW_TXEXCESSIVECOLLISIONS, CPSW_TXLATECOLLISIONS, CPSW_TXUNDERRUN, CPSW_TXCARRIERSENSEERRORS, CPSW_TXOCTETS, CPSW_OCTETFRAMES64, CPSW_OCTETFRAMES65T127, CPSW_OCTETFRAMES128T255, CPSW_OCTETFRAMES256T511, CPSW_OCTETFRAMES512T1023, CPSW_OCTETFRAMES1024TUP, CPSW_NETOCTETS, CPSW_RXSOFOVERRUNS, CPSW_RXMOFOVERRUNS, CPSW_RXDMAOVERRUNS

Affects
CPSW_RXGOODFRAMES=0, CPSW_RXBROADCASTFRAMES=0, CPSW_RXMULTICASTFRAMES=0, CPSW_RXPAUSEFRAMES=0, CPSW_RXCRCERRORS=0, CPSW_RXALIGNCODEERRORS=0, CPSW_RXOVERSIZEDFRAMES=0, CPSW_RXJABBERFRAMES=0, CPSW_RXUNDERSIZEDFRAMES=0, CPSW_RXFRAGMENTS=0, CPSW_RXOCTETS=0, CPSW_TXGOODFRAMES=0, CPSW_TXBROADCASTFRAMES=0, CPSW_TXMULTICASTFRAMES=0, CPSW_TXPAUSEFRAMES=0, CPSW_TXDEFERREDFRAMES=0, CPSW_TXCOLLISIONFRAMES=0, CPSW_TXSINGLECOLLFRAMES=0, CPSW_TXMULTCOLLFRAMES=0, CPSW_TXEXCESSIVECOLLISIONS=0, CPSW_TXLATECOLLISIONS=0, CPSW_TXUNDERRUN=0, CPSW_TXCARRIERSENSEERRORS=0, CPSW_TXOCTETS=0, CPSW_OCTETFRAMES64=0, CPSW_OCTETFRAMES65T127=0, CPSW_OCTETFRAMES128T255=0, CPSW_OCTETFRAMES256T511=0, CPSW_OCTETFRAMES512T1023=0, CPSW_OCTETFRAMES1024TUP=0, CPSW_NETOCTETS=0, CPSW_RXSOFOVERRUNS=0, CPSW_RXMOFOVERRUNS=0, CPSW_RXDMAOVERRUNS=0

Example

 *      CSL_CPSW_3GF_STATS     stats [2];
 
        CSL_CPSW_3GF_getStats (stats);
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_getTxStartWordsReg ( void   ) 

============================================================================
CSL_CPSW_3GF_getTxStartWordsReg

Description
This function retrieves the contents of the Transmit FIFO start words register.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_TX_START_WDS_REG_TX_START_WDS

Example

 *      Uint32          startWordsVal;

        startWordsVal   =   CSL_CPSW_3GF_getTxStartWordsReg ();

	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleAgeOutDone ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleAgeOutDone

Description
This function reads the ALE control register's AGE_OUT_NOW bit to check if the ALE ageable entry cleanup process is done.

Arguments
None

Return Value
TRUE ALE age out process done.
FALSE ALE age out process not yet completed.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_AGE_OUT_NOW

Example

 
        if (CSL_CPSW_3GF_isAleAgeOutDone ();
	 
     

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleBypassEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleBypassEnabled

Description
This function indicates if ALE is programmed to be in Bypass mode.

Arguments
None

Return Value
TRUE ALE Bypass mode enabled.
FALSE ALE Bypass mode disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ALE_BYPASS

Example

        if (CSL_CPSW_3GF_isAleBypassEnabled () == TRUE)
        {
            // ALE Bypass mode on
        }
        else
        {
            // ALE Bypass mode off
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleEnabled

Description
This function indicates if ALE processing is enabled.

Arguments
None

Return Value
TRUE ALE enabled. ALE packet processing will be done.
FALSE ALE disabled. All packets are dropped by ALE.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ENABLE_ALE

Example

        if (CSL_CPSW_3GF_isAleEnabled () == TRUE)
        {
            // ALE enabled
        }
        else
        {
            // ALE disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleLearnNoVIDEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleLearnNoVIDEnabled

Description
This function indicates if ALE is programmed to not learn VLAN Ids.

Arguments
None

Return Value
TRUE ALE Learn no VID enabled. VLAN Id is not learned with source address (source address is not tied to VID)
FALSE ALE VID learning mode enabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_LEARN_NO_VID

Example

        if (CSL_CPSW_3GF_isAleLearnNoVIDEnabled () == TRUE)
        {
            // ALE VID learning disabled
        }
        else
        {
            // ALE VID learning enabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleMacAuthModeEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleMacAuthModeEnabled

Description
This function indicates if ALE MAC Authorization mode is enabled.

Arguments
None

Return Value
TRUE ALE is in MAC authorization mode.
FALSE ALE not in MAC authorization mode.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ENABLE_AUTH_MODE

Example

        if (CSL_CPSW_3GF_isAleMacAuthModeEnabled () == TRUE)
        {
            // ALE  is in MAC authorization mode
        }
        else
        {
            // ALE not in MAC authorization mode
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleOUIDenyModeEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleOUIDenyModeEnabled

Description
This function indicates if ALE is programmed to be in OUI deny mode.

Arguments
None

Return Value
TRUE ALE OUI deny mode enabled.
FALSE ALE OUI deny mode disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ENABLE_OUI_DENY

Example

        if (CSL_CPSW_3GF_isAleOUIDenyModeEnabled () == TRUE)
        {
            // ALE OUI deny mode on
        }
        else
        {
            // ALE OUI deny mode off
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleRateLimitEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleRateLimitEnabled

Description
This function indicates if ALE Broadcast and Multicast Rate Limit is enabled.

Arguments
None

Return Value
TRUE ALE Broadcast and multicast rate limit enabled. Broadcast/multicast packet reception limited to port control register rate limit fields.
FALSE ALE Broadcast and multicast rate limit disabled. Broadcast/multicast rates not limited.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ENABLE_RATE_LIMIT

Example

        if (CSL_CPSW_3GF_isAleRateLimitEnabled () == TRUE)
        {
            // ALE Broadcast/Multicast rate limit enabled
        }
        else
        {
            // ALE Broadcast/Multicast rate limit disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleTxRateLimitEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleTxRateLimitEnabled

Description
This function indicates if ALE is programmed to be Tx rate limited.

Arguments
None

Return Value
TRUE ALE Tx rate limit enabled. Broadcast, multicast rate limit counters are transmit port based.
FALSE ALE Tx rate limit disabled. Broadcast, multicast rate limit counters are receive port based.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_RATE_LIMIT_TX

Example

        if (CSL_CPSW_3GF_isAleTxRateLimitEnabled () == TRUE)
        {
            // ALE Tx rate limit on
        }
        else
        {
            // ALE Tx rate limit off
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleVID0ModeEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleVID0ModeEnabled

Description
This function indicates if ALE is programmed to be in VID0 (VLAN ID=0) mode.

Arguments
None

Return Value
TRUE ALE VID0 mode enabled. Process the packet with VLAN Id = 0
FALSE ALE VID0 mode disabled. Process the packet with VLAN Id =PORT_VLAN[11-0]

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_EN_VID0_MODE

Example

        if (CSL_CPSW_3GF_isAleVID0ModeEnabled () == TRUE)
        {
            // ALE VID0 mode on
        }
        else
        {
            // ALE VID0 mode off
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isAleVlanAwareEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isAleVlanAwareEnabled

Description
This function indicates if ALE is programmed to be VLAN aware.

Arguments
None

Return Value
TRUE ALE VLAN aware. ALE drops packets if VLAN not found.
FALSE ALE not VLAN aware. Floods if VLAN not found.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_ALE_CONTROL_REG_ALE_VLAN_AWARE

Example

        if (CSL_CPSW_3GF_isAleVlanAwareEnabled () == TRUE)
        {
            // ALE VLAN aware
        }
        else
        {
            // ALE not VLAN aware
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isFIFOLoopbackEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isFIFOLoopbackEnabled

Description
This function indicates if FIFO loopback mode is enabled in the CPSW control register.

Arguments
None

Return Value
TRUE FIFO loopback mode enabled. Each packet received is turned around and sent out on the same port's transmit path.
FALSE FIFO loopback mode disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_FIFO_LOOPBACK

Example

        if (CSL_CPSW_3GF_isFIFOLoopbackEnabled (portNum) == TRUE)
        {
            // FIFO loopback mode enabled
        }
        else
        {
            // FIFO loopback mode disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort0Enabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isPort0Enabled

Description
This function indicates if CPPI Port (Port 0) is enabled in the CPSW control register.

Arguments
None

Return Value
TRUE Port 0 enabled.
FALSE Port 0 disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_P0_ENABLE

Example

        if (CSL_CPSW_3GF_isPort0Enabled (portNum) == TRUE)
        {
            // Port 0 enabled
        }
        else
        {
            // Port 0 disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort0PassPriTagEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isPort0PassPriTagEnabled

Description
This function indicates if priority tagging is enabled for Port 0.

Arguments
None

Return Value
TRUE Port 0 ingress priority tagging enabled.
FALSE Port 0 ingress priority tagging disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_P0_PASS_PRI_TAGGED

Example

        if (CSL_CPSW_3GF_isPort0PassPriTagEnabled (portNum) == TRUE)
        {
            // Port 0 pass priority tagging enabled
        }
        else
        {
            // Port 0 pass priority tagging disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort1PassPriTagEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isPort1PassPriTagEnabled

Description
This function indicates if priority tagging is enabled for Port 1.

Arguments
None

Return Value
TRUE Port 1 ingress priority tagging enabled.
FALSE Port 1 ingress priority tagging disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_P1_PASS_PRI_TAGGED

Example

        if (CSL_CPSW_3GF_isPort1PassPriTagEnabled (portNum) == TRUE)
        {
            // Port 1 pass priority tagging enabled
        }
        else
        {
            // Port 1 pass priority tagging disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isPort2PassPriTagEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isPort2PassPriTagEnabled

Description
This function indicates if priority tagging is enabled for Port 2.

Arguments
None

Return Value
TRUE Port 2 ingress priority tagging enabled.
FALSE Port 2 ingress priority tagging disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_P2_PASS_PRI_TAGGED

Example

        if (CSL_CPSW_3GF_isPort2PassPriTagEnabled (portNum) == TRUE)
        {
            // Port 2 pass priority tagging enabled
        }
        else
        {
            // Port 2 pass priority tagging disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE Uint32 CSL_CPSW_3GF_isVlanAwareEnabled ( void   ) 

============================================================================
CSL_CPSW_3GF_isVlanAwareEnabled

Description
This function indicates if VLAN aware mode is enabled in the CPSW control register.

Arguments
None

Return Value
TRUE VLAN aware mode enabled.
FALSE VLAN aware mode disabled.

Pre Condition
None

Post Condition
None

Reads
CPSW_3GF_CPSW_CONTROL_REG_VLAN_AWARE

Example

        if (CSL_CPSW_3GF_isVlanAwareEnabled (portNum) == TRUE)
        {
            // VLAN aware mode enabled
        }
        else
        {
            // VLAN aware mode disabled
        }
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleControlReg ( Uint32  aleCtrlVal  ) 

============================================================================
CSL_CPSW_3GF_setAleControlReg

Description
This function sets up the contents of the ALE control register.

Arguments

        aleCtrlVal          Value to be configured to the ALE control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG

Example

 *      Uint32          aleCtrlVal = 0;

        aleCtrlVal      =   CSL_CPSW_3GF_getAleControlReg ();
        aleCtrlVal      |=  CSL_CPSW_3GF_ALECONTROL_CLRTABLE_EN;

        CSL_CPSW_3GF_setAleControlReg (&aleCtrlRegInfo);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleMcastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY pMcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_setAleMcastAddrEntry

Description
This function sets up the ALE table entry for the index specified with Multicast address configuration specified here.

Arguments

        index                   ALE table index.
        pMcastAddrCfg           ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                              index;
        CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY    mcastAddrCfg;

        index   =   0;
        mcastAddrCfg.macAddress [0] = 0x00;
        mcastAddrCfg.macAddress [1] = 0x01;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add Multicast address entry
            CSL_CPSW_3GF_setAleMcastAddrEntry (index, &mcastAddrCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleOUIAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_OUIADDR_ENTRY pOUIAddrCfg 
)

============================================================================
CSL_CPSW_3GF_setAleOUIAddrEntry

Description
This function sets up the ALE table entry for the index specified with OUI address configuration specified here.

Arguments

        index                   ALE table index.
        pOUIAddrCfg             ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_OUIADDR_ENTRY          ouiAddrCfg;

        index   =   0;
        ouiAddrCfg.ouiAddress [0] = 0x00;
        ouiAddrCfg.ouiAddress [1] = 0x01;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add OUI address entry
            CSL_CPSW_3GF_setAleOUIAddrEntry (index, &ouiAddrCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAlePortControlReg ( Uint32  portNo,
CSL_CPSW_3GF_ALE_PORTCONTROL pPortControlInfo 
)

============================================================================
CSL_CPSW_3GF_setAlePortControlReg

Description
This function sets up the contents of ALE Port control register corresponding to the port number specified.

Arguments

        portNo                  Port number for which the ALE port control register
                                must be configured.
        pPortControlInfo        CSL_CPSW_3GF_ALE_PORTCONTROL structure that contains 
                                port control register settings to be written.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_PORT_CONTROL_REG_PORT_STATE, CPSW_3GF_ALE_PORT_CONTROL_REG_DROP_UNTAGGED, CPSW_3GF_ALE_PORT_CONTROL_REG_VID_INGRESS_CHECK, CPSW_3GF_ALE_PORT_CONTROL_REG_NO_LEARN, CPSW_3GF_ALE_PORT_CONTROL_REG_MCAST_LIMIT, CPSW_3GF_ALE_PORT_CONTROL_REG_BCAST_LIMIT

Example

        Uint32                          index;
        CSL_CPSW_3GF_ALE_PORTCONTROL    portControlInfo;

        index   =   0;
        portControlInfo.portState   =   ALE_PORTSTATE_FORWARD |
                                        ALE_PORTSTATE_LEARN;
 
        CSL_CPSW_3GF_setAlePortControlReg (index, &portControlInfo);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAlePrescaleReg ( Uint32  alePrescaleVal  ) 

============================================================================
CSL_CPSW_3GF_setAlePrescaleReg

Description
This function sets up the contents of the ALE prescale register.

Arguments

        alePrescaleVal      Value to be configured to the ALE Prescale register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_PRESCALE_REG_ALE_PRESCALE

Example

 *      Uint32          alePrescaleVal = 0;

        alePrescaleVal  =   10;

        CSL_CPSW_3GF_setAlePrescaleReg (&aleCtrlRegInfo);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleTableEntry ( Uint32  index,
Uint32  aleInfoWd0,
Uint32  aleInfoWd1,
Uint32  aleInfoWd2 
)

============================================================================
CSL_CPSW_3GF_setAleTableEntry

Description
This function sets up an ALE table entry corresponding to the ALE entry index specified in 'index' input parameter. The ALE entry values corresponding to the ALE_TBLW0, ALE_TBLW1 and ALE_TBLW2 registers msut be specified in 'aleInfoWd0', 'aleInfoWd1', 'aleInfoWd2' input parameters.

Arguments

        index                   ALE table index to be written.
        aleInfoWd0              Value to write to ALE Table Word 0 Register (ALE_TBLW0).
        aleInfoWd1              Value to write to Table Word 1 Register (ALE_TBLW1).
        aleInfoWd2              Value to write to ALE Table Word 2 Register (ALE_TBLW2).
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_WORD0_REG_ENTRY_31_0, CPSW_3GF_ALE_TABLE_WORD1_REG_ENTRY_63_32, CPSW_3GF_ALE_TABLE_WORD2_REG_ENTRY_71_64, CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1

Example

        Uint32      index, info0, info1, info2;

        index   =   0;
        info0   =   ...;
        info1   =   ...;
        info2   =   ...;
 
        CSL_CPSW_3GF_setAleTableEntry (index, 
                                          info0,
                                          info1,
                                          info2);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleUnicastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY pUcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_setAleUnicastAddrEntry

Description
This function sets up the ALE table entry for the index specified with unicast address configuration specified here.

Arguments

        index                   ALE table index.
        pUcastAddrCfg           ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY      ucastAddrCfg;

        index   =   0;
        ucastAddrCfg.macAddress [0] = 0x00;
        ucastAddrCfg.macAddress [1] = 0x01;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add Unicast address entry
            CSL_CPSW_3GF_setAleUnicastAddrEntry (index, &ucastAddrCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleUnkownVlanReg ( Uint32  unVlanMemList,
Uint32  unMcastFloodMask,
Uint32  unRegMcastFloodMask,
Uint32  unForceUntagEgress 
)

============================================================================
CSL_CPSW_3GF_setAleUnkownVlanReg

Description
This function sets up the contents of the ALE Unknown VLAN register.

Arguments

        unVlanMemList           Unknown VLAN member list.
        unMcastFloodMask        Unknown VLAN Multicast flood mask.
        unRegMcastFloodMask     Unknown VLAN Registered Multicast Flood mask.
        unForceUntagEgress      Unknown VLAN Force Untagged Egress.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_VLAN_MEMBER_LIST, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_MCAST_FLOOD_MASK, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_REG_MCAST_FLOOD_MASK, CPSW_3GF_ALE_UNKNOWN_VLAN_REG_UNKNOWN_FORCE_UNTAGGED_EGRESS

Example

        Uint32      unVlanMemList, unMcastFloodMask, unRegMcastFloodMask, unForceUntagEgress;

        unVlanMemList           =   0;
        unMcastFloodMask        =   3;
        unRegMcastFloodMask     =   0;
        unForceUntagEgress      =   0;
 
        CSL_CPSW_3GF_setAleUnkownVlanReg (unVlanMemList, 
                                          unMcastFloodMask,
                                          unRegMcastFloodMask,
                                          unForceUntagEgress);
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLAN_ENTRY pVlanCfg 
)

============================================================================
CSL_CPSW_3GF_setAleVlanEntry

Description
This function sets up the ALE table entry for the index specified with VLAN configuration specified here.

Arguments

        index                   ALE table index.
        pVlanCfg                ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLAN_ENTRY             vlanCfg;

        index   =   0;
        vlanCfg.vlanId  = 0x10;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add VLAN entry
            CSL_CPSW_3GF_setAleVlanEntry (index, &vlanCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanMcastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY pVlanMcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_setAleVlanMcastAddrEntry

Description
This function sets up the ALE table entry for the index specified with VLAN Multicast address configuration specified here.

Arguments

        index                   ALE table index.
        pVlanMcastAddrCfg       ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY    vlanMcastAddrCfg;

        index   =   0;
        vlanMcastAddrCfg.macAddress [0] = 0x00;
        vlanMcastAddrCfg.macAddress [1] = 0x01;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add VLAN Multicast address entry
            CSL_CPSW_3GF_setAleVlanMcastAddrEntry (index, &vlanMcastAddrCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setAleVlanUnicastAddrEntry ( Uint32  index,
CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY pVlanUcastAddrCfg 
)

============================================================================
CSL_CPSW_3GF_setAleVlanUnicastAddrEntry

Description
This function sets up the ALE table entry for the index specified with VLAN unicast address configuration specified here.

Arguments

        index                   ALE table index.
        pVlanUcastAddrCfg       ALE entry contents to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_TABLE_CONTROL_REG_ENTRY_POINTER, CPSW_3GF_ALE_TABLE_CONTROL_REG_WRITE_RDZ=1 CPSW_3GF_ALE_TABLE_WORD0, CPSW_3GF_ALE_TABLE_WORD1, CPSW_3GF_ALE_TABLE_WORD2

Example

        Uint32                                  index;
        CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY  vlanUcastAddrCfg;

        index   =   0;
        vlanUcastAddrCfg.macAddress [0] = 0x00;
        vlanUcastAddrCfg.macAddress [1] = 0x01;
        ...
 
        if (CSL_CPSW_3GF_getALEEntryType (index) == ALE_ENTRYTYPE_FREE)
        {
            // ALE entry is free

            // Add VLAN Unicast address entry
            CSL_CPSW_3GF_setAleVlanUnicastAddrEntry (index, &vlanUcastAddrCfg);
        }
	 
     

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setCppiSourceIdReg ( Uint32  txASrcId,
Uint32  txBSrcId 
)

============================================================================
CSL_CPSW_3GF_setCppiSourceIdReg

Description
This function sets up the contents of the CPPI Source Identification register.

Arguments

        txASrcId            CPPI Source Id to configure for TxA.
        txBSrcId            CPPI Source Id to configure for TxB.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P0_CPPI_SRC_ID_REG_TXA_SRC_ID, CPSW_3GF_P0_CPPI_SRC_ID_REG_TXB_SRC_ID

Example

 *      Uint32      txASrcId, txBSrcId;
 
        txASrcId    =   1;
        txBSrcId    =   2;

        CSL_CPSW_3GF_setCppiSourceIdReg (txASrcId, txBSrcId);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setCpswControlReg ( CSL_CPSW_3GF_CONTROL pControlRegInfo  ) 

============================================================================
CSL_CPSW_3GF_setCpswControlReg

Description
This function populates the contents of the CPSW Control register.

Arguments

        pControlRegInfo     CSL_CPSW_CONTROL structure that holds the values 
                            that need to be configured to the CPSW control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
CPSW control register modified with values provided.

Writes
CPSW_3GF_CPSW_CONTROL_REG_FIFO_LOOPBACK, CPSW_3GF_CPSW_CONTROL_REG_VLAN_AWARE, CPSW_3GF_CPSW_CONTROL_REG_P0_ENABLE, CPSW_3GF_CPSW_CONTROL_REG_P0_PASS_PRI_TAGGED, CPSW_3GF_CPSW_CONTROL_REG_P1_PASS_PRI_TAGGED, CPSW_3GF_CPSW_CONTROL_REG_P2_PASS_PRI_TAGGED

Example

        CSL_CPSW_3GF_CONTROL    controlRegInfo;

        controlRegInfo.fifoLb       =   1;
        controlRegInfo.vlanAware    =   0;
        ...

        CSL_CPSW_3GF_setCpswControlReg (&controlRegInfo);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setEmulationControlReg ( Uint32  free,
Uint32  soft 
)

============================================================================
CSL_CPSW_3GF_setEmulationControlReg

Description
This function sets up the contents of the CPSW Emulation Control register.

Arguments

        free                   Emulation free bit configuration
        soft                   Emulation soft bit configuration
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_EM_CONTROL_REG_FREE, CPSW_3GF_EM_CONTROL_REG_SOFT

Example

        Uint32 free, soft;

        free   =   0;
        soft   =   1;

        CSL_CPSW_3GF_setEmulationControlReg (free, soft);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setFlowControlReg ( CSL_CPSW_3GF_FLOWCNTL pFlowControlCfg  ) 

============================================================================
CSL_CPSW_3GF_setFlowControlReg

Description
This function sets up the contents of the Flow control register.

Arguments

        pFlowControlCfg     CSL_CPSW_3GF_FLOWCNTL structure that contains the values
                            that need to be configured to Flow control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_FLOW_CONTROL_REG_P0_FLOW_EN, CPSW_3GF_FLOW_CONTROL_REG_P1_FLOW_EN, CPSW_3GF_FLOW_CONTROL_REG_P2_FLOW_EN

Example

 *      CSL_CPSW_3GF_FLOWCNTL       flowControlCfg;
 
        flowControlCfg.p0FlowEnable =   1;
        flowControlCfg.p1FlowEnable =   1;:
        flowControlCfg.p2FlowEnable =   1;

        CSL_CPSW_3GF_setFlowControlReg (&flowControlCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0RxMaxLen ( Uint32  rxMaxLen  ) 

============================================================================
CSL_CPSW_3GF_setPort0RxMaxLen

Description
This function sets up the Port0 Receive Maximum length register.

Arguments

        rxMaxLen            Maximum receive frame length to configure.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_RX_MAXLEN_REG_RX_MAXLEN

Example

 *      Uint32      rxMaxLen;
 
        rxMaxLen    =   1518;            
 
        CSL_CPSW_3GF_setPort0RxMaxLen (rxMaxLen);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0RxPriMapReg ( Uint32 *  pPortRxPriMap  ) 

============================================================================
CSL_CPSW_3GF_setPort0RxPriMapReg

Description
This function sets up the contents of the Port 0 Receive Packet Priority to Header Priority Mapping Register.

Arguments

        pPortRxPriMap           Array of Port 0 Rx priority map priority values 
                                that must be configured to the register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P0_RX_PRI_MAP_REG_PRI0, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI1, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI2, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI3, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI4, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI5, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI6, CPSW_3GF_P0_RX_PRI_MAP_REG_PRI7

Example

 *      Uint32      i, port0RxPriMap [8];

        for (i = 0; i < 8; i ++)
            port0RxPriMap [i] = i;

        CSL_CPSW_3GF_setPort0RxPriMapReg (port0RxPriMap);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPort0VlanReg ( Uint32  portVID,
Uint32  portCFI,
Uint32  portPRI 
)

============================================================================
CSL_CPSW_3GF_setPort0VlanReg

Description
This function sets up the contents of the Port 0 VLAN Register.

Arguments

        portVID                 Port VLAN Id to be configured
        portCFI                 Port CFI bit to be configured
        portPRI                 Port VLAN priority to be configured
                                (0-7, 7 is highest priority)
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P0_PORT_VLAN_REG_PORT_VID, CPSW_3GF_P0_PORT_VLAN_REG_PORT_CFI, CPSW_3GF_P0_PORT_VLAN_REG_PORT_PRI

Example

 *      Uint32      portVID, portCFI, portPRI;
 
        portVID     =   1;
        portCFI     =   0;
        portPRI     =   7;

        CSL_CPSW_3GF_setPort0VlanReg (portVID, portCFI, portPRI);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortMACAddress ( Uint32  portNum,
Uint8 *  pMacAddress 
)

============================================================================
CSL_CPSW_3GF_setPortMACAddress

Description
This function sets up the source MAC address corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the source MAC address
                                must be setup.
        pMacAddress             6 byte Source MAC address to configure.
 *	 

Return Value
None

Pre Condition
The input parameter 'pMacAddres' is expected to be 6 bytes long.

Post Condition
None

Writes
CPSW_3GF_SL_SA_LO_REG_MACSRCADDR_7_0, CPSW_3GF_SL_SA_LO_REG_MACSRCADDR_15_8, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_23_16, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_31_24, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_39_32, CPSW_3GF_SL_SA_HI_REG_MACSRCADDR_47_40

Example

 *      Uint8   macAddress [6], portNum;
 
        portNum         =   1;
        macAddress [0]  =   0x01;
        macAddress [1]  =   0x02;
        macAddress [2]  =   0x03;
        macAddress [3]  =   0x04;
        macAddress [4]  =   0x05;
        macAddress [5]  =   0x06;
 
        CSL_CPSW_3GF_setPortMACAddress (portNum, macAddress);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortMaxBlocksReg ( Uint32  portNum,
Uint32  rxMaxBlks,
Uint32  txMaxBlks 
)

============================================================================
CSL_CPSW_3GF_setPortMaxBlocksReg

Description
This function sets up the contents of the Port Max Blocks Register corresponding to the MAC port specified.

Arguments

        portNum                 MAC port number for which the max block numbers
                                must be configured.
        rxMaxBlks               Maximum number of 4K memory blocks that must be allocated
                                for the port's FIFO logical receive priority queues.
        txMaxBlks               Maximum number of 4K memory blocks that must be allocated
                                for the port's FIFO logical transmit priority queues.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_MAX_BLKS_REG_RX_MAX_BLKS, CPSW_3GF_P_MAX_BLKS_REG_TX_MAX_BLKS

Example

 *      Uint32      rxMaxBlks, txMaxBlks, portNum;

        portNum     =   1;            
        rxMaxBlks   =   3;
        txMaxBlks   =   17;
 
        CSL_CPSW_3GF_getPortMaxBlocksReg (portNum, rxMaxBlks, txMaxBlks);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortStatsEnableReg ( CSL_CPSW_3GF_PORTSTAT pPortStatsCfg  ) 

============================================================================
CSL_CPSW_3GF_setPortStatsEnableReg

Description
This function sets up the contents of the CPSW Port Statistics Enable register.

Arguments

        pPortStatsCfg       CSL_CPSW_3GF_PORTSTAT structure that contains the values
                            to be used to setup port statistics enable register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_STAT_PORT_EN_REG_P0A_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P0B_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P1_STAT_EN, CPSW_3GF_STAT_PORT_EN_REG_P2_STAT_EN

Example

        CSL_CPSW_3GF_PORTSTAT       portStatsCfg;

        portStatsCfg.p0AStatEnable  =   1;
        portStatsCfg.p0BStatEnable  =   1;
        portStatsCfg.p1StatEnable   =   1;
        portStatsCfg.p2StatEnable   =   1;

        CSL_CPSW_3GF_setPortStatsEnableReg (&portStatsCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncCntlReg ( Uint32  portNum,
CSL_CPSW_3GF_TSCNTL pTimeSyncCntlCfg 
)

============================================================================
CSL_CPSW_3GF_setPortTimeSyncCntlReg

Description
This function sets up the contents of Time sync control register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be 
                                configured.
        pTimeSyncCntlCfg        CSL_CPSW_3GF_TSCNTL containing settings for time
                                sync control register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_TS_CTL_REG_TS_RX_EN, CPSW_3GF_P_TS_CTL_REG_TS_RX_VLAN_LTYPE1_EN, CPSW_3GF_P_TS_CTL_REG_TS_RX_VLAN_LTYPE2_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_VLAN_LTYPE1_EN, CPSW_3GF_P_TS_CTL_REG_TS_TX_VLAN_LTYPE2_EN, CPSW_3GF_P_TS_CTL_REG_TX_MSG_TYPE_EN_15_0

Example

 *      Uint32              portNum;
        CSL_CPSW_3GF_TSCNTL     tsCtlCfg;
 
        portNum =   1;

        tsCtlCfg.tsRxEnable             =   1;
        tsCtlCfg.tsRxVlanLType1Enable   =   0;
        tsCtlCfg.tsRxVlanLType2Enable   =   0;
        ...
 
        CSL_CPSW_3GF_setPortTimeSyncCntlReg (portNum, &tsCtlCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncSeqIdReg ( Uint32  portNum,
Uint32  tsLtype,
Uint32  tsSeqIdOffset 
)

============================================================================
CSL_CPSW_3GF_setPortTimeSyncSeqIdReg

Description
This function sets up the contents of Time Sync Sequence Id and LTYPE register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be 
                                configured.
        tsLtype                 Time sync LTYPE to be configured.
        tsSeqIdOffset           Time sync sequence Id offset to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_TS_SEQ_LTYPE_REG_TS_LTYPE, CPSW_3GF_P_TS_SEQ_LTYPE_REG_TS_SEQ_ID_OFFSET

Example

 *      Uint32              portNum, tsLtype, tsSeqIdOffset;
 
        portNum         =   1;
        tsLtype         =   0;
        tsSeqIdOffset   =   30;
 
        CSL_CPSW_3GF_getPortTimeSyncSeqIdReg (portNum, tsLtype, tsSeqIdOffset);
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTimeSyncVlanLTypeReg ( Uint32  portNum,
Uint32  tsVlanLtype1,
Uint32  tsVlanLtype2 
)

============================================================================
CSL_CPSW_3GF_setPortTimeSyncVlanLTypeReg

Description
This function sets up the contents of Time Sync VLAN LTYPE register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the register must be read.
        tsVlanLtype1            Time sync VLAN LTYPE1 value to be configured.
        tsVlanLtype2            Time sync VLAN LTYPE2 value to be configured.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_TS_VLAN_LTYPE_REG_TS_VLAN_LTYPE1, CPSW_3GF_P_TS_VLAN_LTYPE_REG_TS_VLAN_LTYPE2

Example

 *      Uint32              portNum, tsLtype1, tsLtype2;
 
        portNum     =   1;
        tsLtype1    =   0x8100;
        tsLtype2    =   0x8100;
 
        CSL_CPSW_3GF_setPortTimeSyncVlanLTypeReg (portNum, &tsLtype1, &tsLtype2);
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortTxPriMapReg ( Uint32  portNum,
Uint32 *  pPortTxPriMap 
)

============================================================================
CSL_CPSW_3GF_setPortTxPriMapReg

Description
This function sets up the contents of the Port Transmit Header Priority to Switch Priority Mapping Register.

Arguments

        portNum                 MAC port number for which the register contents
                                must be configured.
        pPortTxPriMap           Array of Port Tx priority map priority values 
                                that must be configured to the register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_TX_PRI_MAP_REG_PRI0, CPSW_3GF_P_TX_PRI_MAP_REG_PRI1, CPSW_3GF_P_TX_PRI_MAP_REG_PRI2, CPSW_3GF_P_TX_PRI_MAP_REG_PRI3, CPSW_3GF_P_TX_PRI_MAP_REG_PRI4, CPSW_3GF_P_TX_PRI_MAP_REG_PRI5, CPSW_3GF_P_TX_PRI_MAP_REG_PRI6, CPSW_3GF_P_TX_PRI_MAP_REG_PRI7

Example

 *      Uint32      i, portTxPriMap [8], portNum;

        for (i = 0; i < 8; i ++)
            portTxPriMap [i] = i;

        portNum =   1;            

        CSL_CPSW_3GF_setPortTxPriMapReg (portNum, portTxPriMap);
	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPortVlanReg ( Uint32  portNum,
Uint32  portVID,
Uint32  portCFI,
Uint32  portPRI 
)

============================================================================
CSL_CPSW_3GF_setPortVlanReg

Description
This function sets up the contents of the VLAN Register corresponding to the MAC port number specified.

Arguments

        portNum                 MAC port number for which the VLAN register 
                                must be configured.
        portVID                 Port VLAN Id to be configured
        portCFI                 Port CFI bit to be configured
        portPRI                 Port VLAN priority to be configured
                                (0-7, 7 is highest priority)
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_P_PORT_VLAN_REG_PORT_VID, CPSW_3GF_P_PORT_VLAN_REG_PORT_CFI, CPSW_3GF_P_PORT_VLAN_REG_PORT_PRI

Example

 *      Uint32      portVID, portCFI, portPRI, portNum;
    
        portNum     =   2;
        portVID     =   1;
        portCFI     =   0;
        portPRI     =   7;

        CSL_CPSW_3GF_setPortVlanReg (portNum, portVID, portCFI, portPRI);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setPrioTypeReg ( CSL_CPSW_3GF_PTYPE pTypeCfg  ) 

============================================================================
CSL_CPSW_3GF_setPrioTypeReg

Description
This function modifies the contents of the CPSW Priority Type register.

Arguments

        pTypeCfg            CSL_CPSW_3GF_PTYPE structure that contains the values that
                            need to be populated to Priority type register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_PTYPE_REG_ESC_PRI_LD_VAL, CPSW_3GF_PTYPE_REG_P0_PTYPE_ESC, CPSW_3GF_PTYPE_REG_P1_PTYPE_ESC, CPSW_3GF_PTYPE_REG_P2_PTYPE_ESC

Example

        CSL_CPSW_3GF_PTYPE       pTypeCfg;

        pTypeCfg.escPriLdVal    =   1;
        pTypeCfg.p0PtypeEsc     =   1;
        ...

        CSL_CPSW_3GF_setPrioTypeReg (&pTypeCfg);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setShortGapThreshold ( Uint32  gapThreshVal  ) 

============================================================================
CSL_CPSW_3GF_setShortGapThreshold

Description
This function sets up the contents of the CPSW MAC Short Gap Threshold register.

Arguments

        gapThreshVal        Gap threshold value to use to configure the MAC Short
                            gap threshold value.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_GAP_THRESH_CPGMAC_SL_REG_GAP_THRESH

Example

 *      Uint32          gapThreshVal;
 *
 *      gapThreshVal    =   11;

        CSL_CPSW_3GF_setShortGapThreshold (gapThreshVal);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_setTxStartWordsReg ( Uint32  startWordsVal  ) 

============================================================================
CSL_CPSW_3GF_setTxStartWordsReg

Description
This function sets up the contents of the Transmit FIFO start words register.

Arguments

        pStartWordsVal      Start words value to be set to the Transmit FIFO start
                            words register.
 *	 

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_TX_START_WDS_REG_TX_START_WDS

Example

 *      Uint32          startWordsVal;
 *
 *      startWordsVal   =   32;

        CSL_CPSW_3GF_setTxStartWordsReg (startWordsVal);

	 

=============================================================================

CSL_IDEF_INLINE void CSL_CPSW_3GF_startAleAgeOutNow ( void   ) 

============================================================================
CSL_CPSW_3GF_startAleAgeOutNow

Description
This function configures the ALE control register to initiate an ALE ageable entry cleanup. This enables the ALE hardware to remove any ageable table entry that does not have a set touch bit.

Arguments
None

Return Value
None

Pre Condition
None

Post Condition
None

Writes
CPSW_3GF_ALE_CONTROL_REG_AGE_OUT_NOW=1

Example

 
        CSL_CPSW_3GF_startAleAgeOutNow ();
	 
     

=============================================================================


Copyright 2012, Texas Instruments Incorporated