pcieDevCap2Reg_s Struct Reference
[PCIE LLD Capabilities Register Definitions]

Specification of the Device Capabilities 2 Register. More...

#include <pcie.h>

Data Fields

uint32_t raw
uint8_t cmplToDisSupp
 [rw] Completion timeout disable supported
uint8_t cmplToEn
 [rw] Completion timeout ranges supported. Applicable to RC/EP that issue requests on own behalf.

Detailed Description

Specification of the Device Capabilities 2 Register.

This register may be used for both endpoint and root complex modes.


Field Documentation

[rw] Completion timeout disable supported

Field size: 1 bit

[rw] Completion timeout ranges supported. Applicable to RC/EP that issue requests on own behalf.

Field size: 4 bits

[ro] Raw image of register on read; actual value on write


The documentation for this struct was generated from the following file:

Copyright 2012, Texas Instruments Incorporated