pcieIbOffsetReg_s Struct Reference
[PCIE LLD Application Register Definitions]

Specification of the Inbound Translation Address Offset Register. More...

#include <pcie.h>

Data Fields

uint32_t raw
 [ro] Raw image of register on read; actual value on write
uint32_t ibOffset
 [rw] Offset address bits [31:8] for inbound translation region

Detailed Description

Specification of the Inbound Translation Address Offset Register.

There are multiple instances (0-3) of this register.


Field Documentation

[rw] Offset address bits [31:8] for inbound translation region

Field size: 24 bits


The documentation for this struct was generated from the following file:

Copyright 2012, Texas Instruments Incorporated