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Specification of the ERR Interrupt Enabled Status Register. More...
#include <pcie.h>
Data Fields | |
uint32_t | raw |
uint8_t | errAer |
[rw] ECRC error status | |
uint8_t | errAxi |
[rw] AXI tag lookup fatal error status | |
uint8_t | errCorr |
[rw] correctable error status | |
uint8_t | errNonFatal |
[rw] nonfatal error status | |
uint8_t | errFatal |
[rw] fatal error status | |
uint8_t | errSys |
[rw] system error (fatal, nonfatal, correctable error) status |
Specification of the ERR Interrupt Enabled Status Register.
uint8_t pcieErrIrqStatusReg_s::errAer |
[rw] ECRC error status
Field size: 1 bit
uint8_t pcieErrIrqStatusReg_s::errAxi |
[rw] AXI tag lookup fatal error status
Field size: 1 bit
uint8_t pcieErrIrqStatusReg_s::errCorr |
[rw] correctable error status
Field size: 1 bit
uint8_t pcieErrIrqStatusReg_s::errFatal |
[rw] fatal error status
Field size: 1 bit
[rw] nonfatal error status
Field size: 1 bit
uint8_t pcieErrIrqStatusReg_s::errSys |
[rw] system error (fatal, nonfatal, correctable error) status
Field size: 1 bit
uint32_t pcieErrIrqStatusReg_s::raw |
[ro] Raw image of register on read; actual value on write