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Specification of the MSI Interrupt Enable Set Register. More...
#include <pcie.h>
Data Fields | |
| uint32_t | raw |
| uint8_t | msiIrqEnSet |
| [rw] Each bit, when written to, enables the MSI interrupt (24, 16, 8, 0) associated with the bit | |
Specification of the MSI Interrupt Enable Set Register.
There are multiple instances (0-7) of this register.
[rw] Each bit, when written to, enables the MSI interrupt (24, 16, 8, 0) associated with the bit
Field size: 4 bits
| uint32_t pcieMsiIrqEnableSetReg_s::raw |
[ro] Raw image of register on read; actual value on write