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Specification of the ERR Interrupt Enable Set Register. More...
#include <pcie.h>
Data Fields | |
| uint32_t | raw |
| uint8_t | errAer |
| [rw] set to enable the ECRC error interrupt | |
| uint8_t | errAxi |
| [rw] set to enable the AXI tag lookup fatal error interrupt | |
| uint8_t | errCorr |
| [rw] set to enable the correctable error interrupt | |
| uint8_t | errNonFatal |
| [rw] set to enable the nonfatal error interrupt | |
| uint8_t | errFatal |
| [rw] set to enable the fatal error interrupt | |
| uint8_t | errSys |
| [rw] set to enable the system error (fatal, nonfatal, correctable error) interrupt | |
Specification of the ERR Interrupt Enable Set Register.
| uint8_t pcieErrIrqEnableSetReg_s::errAer |
[rw] set to enable the ECRC error interrupt
Field size: 1 bit
| uint8_t pcieErrIrqEnableSetReg_s::errAxi |
[rw] set to enable the AXI tag lookup fatal error interrupt
Field size: 1 bit
[rw] set to enable the correctable error interrupt
Field size: 1 bit
[rw] set to enable the fatal error interrupt
Field size: 1 bit
[rw] set to enable the nonfatal error interrupt
Field size: 1 bit
| uint8_t pcieErrIrqEnableSetReg_s::errSys |
[rw] set to enable the system error (fatal, nonfatal, correctable error) interrupt
Field size: 1 bit
| uint32_t pcieErrIrqEnableSetReg_s::raw |
[ro] Raw image of register on read; actual value on write