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Data Structures | |
| struct | CSL_CPSW_3GF_VERSION |
| Holds the Time sync submodule's version info. More... | |
| struct | CSL_CPSW_3GF_CONTROL |
| Holds CPSW control register contents. More... | |
| struct | CSL_CPSW_3GF_PORTSTAT |
| Holds Port Statistics Enable register contents. More... | |
| struct | CSL_CPSW_3GF_PTYPE |
| Holds Priority type register contents. More... | |
| struct | CSL_CPSW_3GF_FLOWCNTL |
| Holds flow control register contents. More... | |
| struct | CSL_CPSW_3GF_TSCNTL |
| Holds Port Time Sync Control register contents. More... | |
| struct | CSL_CPSW_3GF_STATS |
| Holds the EMAC statistics. More... | |
| struct | CSL_CPSW_3GF_ALE_VERSION |
| Holds the ALE submodule's version info. More... | |
| struct | CSL_CPSW_3GF_ALE_PORTCONTROL |
| Holds the ALE Port control register info. More... | |
| struct | CSL_CPSW_3GF_ALE_MCASTADDR_ENTRY |
| Holds the ALE Multicast Address Table entry configuration. More... | |
| struct | CSL_CPSW_3GF_ALE_VLANMCASTADDR_ENTRY |
| Holds the ALE VLAN/Multicast Address Table entry configuration. More... | |
| struct | CSL_CPSW_3GF_ALE_UNICASTADDR_ENTRY |
| Holds the ALE Unicast Address Table entry configuration. More... | |
| struct | CSL_CPSW_3GF_ALE_OUIADDR_ENTRY |
| Holds the ALE OUI Unicast Address Table entry configuration. More... | |
| struct | CSL_CPSW_3GF_ALE_VLANUNICASTADDR_ENTRY |
| Holds the ALE VLAN Unicast Address Table entry configuration. More... | |
| struct | CSL_CPSW_3GF_ALE_VLAN_ENTRY |
| Holds the ALE VLAN Table entry configuration. More... | |
Defines | |
| #define | hCpsw3gfRegs ((CSL_Cpsw_3gfRegs *) (CSL_PA_SS_CFG_REGS + 0x00090800)) |
| Pointer to the Ethernet Switch overlay registers. | |
| #define | CSL_CPSW_3GF_NUMSTATBLOCKS 2 |
| Number of statistic blocks. | |
| #define | CSL_CPSW_3GF_NUMSTATS 36 |
| Number of hardware statistics registers. | |
| #define | CSL_CPSW_3GF_NUMALE_ENTRIES 1024 |
| Maximum number of ALE entries that can be programmed. | |
| #define | CSL_CPSW_3GF_ALECONTROL_RATELIMIT_EN (1 << 0u) |
| ALE control register configuration definitions. | |
| #define | CSL_CPSW_3GF_ALECONTROL_AUTHMODE_EN (1 << 1u) |
| #define | CSL_CPSW_3GF_ALECONTROL_VLANAWARE_EN (1 << 2u) |
| #define | CSL_CPSW_3GF_ALECONTROL_RATELIMIT_TX_EN (1 << 3u) |
| #define | CSL_CPSW_3GF_ALECONTROL_OUIDENY_EN (1 << 5u) |
| #define | CSL_CPSW_3GF_ALECONTROL_VID0MODE_EN (1 << 6u) |
| #define | CSL_CPSW_3GF_ALECONTROL_LEARN_NO_VID_EN (1 << 7u) |
| #define | CSL_CPSW_3GF_ALECONTROL_AGEOUT_NOW_EN (1 << 29u) |
| #define | CSL_CPSW_3GF_ALECONTROL_CLRTABLE_EN (1 << 30u) |
| #define | CSL_CPSW_3GF_ALECONTROL_ALE_EN (1 << 31u) |
| #define | CSL_CPSW_3GF_PORTMASK_PORT0_EN (1 << 0u) |
| Port Mask definitions. | |
| #define | CSL_CPSW_3GF_PORTMASK_PORT1_EN (1 << 1u) |
| #define | CSL_CPSW_3GF_PORTMASK_PORT2_EN (1 << 2u) |
Enumerations | |
| enum | CSL_CPSW_3GF_ALE_PORTSTATE |
Defines ALE port states. | |
| enum | CSL_CPSW_3GF_ALE_ENTRYTYPE |
Defines ALE Table Entry types. | |
| enum | CSL_CPSW_3GF_ALE_UCASTTYPE |
Defines ALE Unicast types. | |
| enum | CSL_CPSW_3GF_ALE_ADDRTYPE |
Defines ALE Address types. | |
| #define CSL_CPSW_3GF_ALECONTROL_AGEOUT_NOW_EN (1 << 29u) |
Age out now enable
| #define CSL_CPSW_3GF_ALECONTROL_ALE_EN (1 << 31u) |
ALE enable
| #define CSL_CPSW_3GF_ALECONTROL_AUTHMODE_EN (1 << 1u) |
MAC auhorization mode enable
| #define CSL_CPSW_3GF_ALECONTROL_CLRTABLE_EN (1 << 30u) |
Clear table enable
| #define CSL_CPSW_3GF_ALECONTROL_LEARN_NO_VID_EN (1 << 7u) |
Learn no VID enable
| #define CSL_CPSW_3GF_ALECONTROL_OUIDENY_EN (1 << 5u) |
OUI deny enable
| #define CSL_CPSW_3GF_ALECONTROL_RATELIMIT_EN (1 << 0u) |
ALE control register configuration definitions.
Enable Broadcast/Multicast rate limit
| #define CSL_CPSW_3GF_ALECONTROL_RATELIMIT_TX_EN (1 << 3u) |
Tx rate limit enable
| #define CSL_CPSW_3GF_ALECONTROL_VID0MODE_EN (1 << 6u) |
VID0 mode enable
| #define CSL_CPSW_3GF_ALECONTROL_VLANAWARE_EN (1 << 2u) |
VLAN Aware Mode enable
| #define CSL_CPSW_3GF_NUMSTATBLOCKS 2 |
Number of statistic blocks.
EMAC has two sub-blocks: STATSA and STATSB.
STATSA holds statistics for Host/CPU port (Switch port 0). STATSB holds statistics for MAC ports (Switch ports 1, 2).
| #define CSL_CPSW_3GF_PORTMASK_PORT0_EN (1 << 0u) |
Port Mask definitions.
Port 0 Enable
| #define CSL_CPSW_3GF_PORTMASK_PORT1_EN (1 << 1u) |
Port 1 Enable
| #define CSL_CPSW_3GF_PORTMASK_PORT2_EN (1 << 2u) |
Port 2 Enable
| #define hCpsw3gfRegs ((CSL_Cpsw_3gfRegs *) (CSL_PA_SS_CFG_REGS + 0x00090800)) |
Pointer to the Ethernet Switch overlay registers.
Constants for passing parameters to the functions.